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F
/ V
REQUENCY
DRAM Clock
DRAM Timing
SDRAM CAS Latency
Bank Interleave
Precharge to Active(Trp)
Active to Precharge(Tras)
Active to CMD(Trcd)
REF to ACT/REF (Trfc)
ACT(0) to ACT(1) (TRRD)
Read to Precharge (Trtp)
Write to Read CMD (Twtr)
Write Recovery Time (Twr)
DRAM Command Rate
RDSAIT mode
RDSAIT selection
Auto Detect PCI Clk
CPU Clock
CPU Clock Ratio
Spread Spectrum
: Move
Enter: Select
F5: Previous Values
DRAM Clock
The chipset supports synchronous and asynchronous mode between host
clock and DRAM clock frequency.
Settings: [By SPD, 100 MHz, 133 MHz, 166 MHz, 200MHz, 266MHz]
DRAM Timing
The value in this field depends on the memory modules installed in your
system.
Changing the value from the factory setting is not recommended
unless you install new memory that has a different performance rating than
the original modules.
Settings: [Manual, Auto By SPD, Turbo, Ultra]
Read to Precharge (Trtp)
Settings: [2T, 3T]
Write to Read CMD (Twtr)
Settings: [1T/2T, 2T/3T]
C
OLTAGE
ONTROL
Phoenix - AwardBIOS CMOS Setup Utility
Frequency / Voltage Control
[By SPD]
[Auto By SPD]
2.5
Disabled
2T
07T
4T
15T
3T
[3T]
[1T/2T]
[4T]
[2T Command]
[Auto]
03
[Enabled]
[100MHz]
[ 6 X]
[0.25%]
+/-/PU/PD: Value
F6: Fail-Safe Defaults
F10: Save
51
Item Help
Menu Level
ESC: Exit
F1: General Help
F7: Optimized Defaults
BIOS Setup
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