Notes On Using Clock Supervisor Counter - Fujitsu 8FX Hardware Manual

CHAPTER 17 CLOCK SUPERVISOR COUNTER
17.5 Notes on Using Clock Supervisor
Counter
17.5

Notes on Using Clock Supervisor Counter

This section provides notes on using the clock supervisor counter.
■ Notes on Using Clock Supervisor Counter
● Restrictions
• Operate the clock supervisor counter in main CR clock mode together with the hardware
watchdog timer (running in standby mode). Otherwise, it cannot detect the abnormal state
of the external clock correctly and will hang up if the external clock stops. See "CHAPTER
8 HARDWARE/SOFTWARE WATCHDOG TIMER" for the hardware watchdog timer
(running in standby mode).
• Use main CR clock mode only. Do not use any other clock mode.
• If the time-base timer stops, the internal counter stops working. Do not clear the time-base
timer while the clock supervisor counter is counting with the external clock.
• Select a time-base timer interval that is sufficiently long for the clock supervisor counter to
operate. See Table 17.3-1 for time-base timer intervals.
• Read the CMDR register when CMCEN = 0. (The value of CMDR remains "0b00000000"
while the clock supervisor counter is operating (CMCEN = 1).)
• When using the clock supervisor counter, ensure that the machine clock cycle is shorter
than half the time-base timer interval selected. If the machine clock cycle is longer than half
the time-base timer interval selected, CMCEN may remain "1" even after the clock
supervisor counter stops.
Table 17.5-1 shows the appropriate clock gear setting for each TBTSEL setting.
Table 17.5-1 Appropriate Clock Gear Setting for Respective TBTSEL Settings
DIV[1:0]
(clock gear setting)
00 (1 1/F )
CRH
01 (4 1/F )
CRH
10 (8 1/F )
CRH
11 (16 1/F )
CRH
❍ : Recommended
x : Prohibited
302
000
3 5
2 1/F 2
CRH
❍
x
x
x
FUJITSU SEMICONDUCTOR LIMITED
MB95630H Series
TBTSEL[2:0]
001 010 to 111
7
1/F 2 1/F
CRH CRH
❍
❍
❍
x
17
to 2 1/F
CRH
❍
❍
❍
❍
MN702-00009-2v0-E