Fujitsu 8FX Hardware Manual page 646

8-bit microcontroller new 8fx family
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APPENDIX A Instruction Overview
2
A.4 F
MC-8FX Instructions
Table A.4-2 Arithmetic Operation Instruction (2 / 2)
No.
MNEMONIC
46 AND
A, #d8
47 AND
A, dir
48 AND
A, @EP
49 AND
A, @IX + off
50 AND
A, Ri
51 OR
A
52 OR
A, #d8
53 OR
A, dir
54 OR
A, @EP
55 OR
A, @IX + off
56 OR
A, Ri
57 CMP
dir, #d8
58 CMP
@EP, #d8
59 CMP
@IX + off, #d8
60 CMP
Ri, #d8
61 INCW
SP
62 DECW
SP
■ Branch Instructions
Table A.4-3 Branch Instructions
No.
MNEMONIC
1 BZ/BEQ
rel(at branch)
BZ/BEQ
rel(at no branch)
2 BNZ/BNE
rel(at branch)
BNZ/BNE
rel(at no branch)
3 BC/BLO
rel(at branch)
BC/BLO
rel(at no branch)
4 BNC/BHS
rel(at branch)
BNC/BHS
rel(at no branch)
5 BN
rel(at branch)
BN
rel(at no branch)
6 BP
rel(at branch)
BP
rel(at no branch)
7 BLT
rel(at branch)
BLT
rel(at no branch)
8 BGE
rel(at branch)
BGE
rel(at no branch)
9 BBC
dir : b, rel
10 BBS
dir : b, rel
11 JMP
@A
12 JMP
ext
13 CALLV
#vct
14 CALL
ext
15 XCHW
A, PC
16 RET
17 RETI
■ Other Instructions
Table A.4-4 Other Instructions
No.
MNEMONIC
1 PUSHW
A
2 POPW
A
3 PUSHW
IX
4 POPW
IX
5 NOP
6 CLRC
7 SETC
8 CLRI
9 SETI
624
~
#
2
2 (A)
(AL)
d8
3
2 (A)
(AL)
(dir)
2
1 (A)
(AL)
( (EP) )
3
2 (A)
(AL)
( (IX) + off)
2
1 (A)
(AL)
(Ri)
1
1 (A)
(AL)
(TL)
2
2 (A)
(AL)
d8
3
2 (A)
(AL)
(dir)
2
1 (A)
(AL)
( (EP) )
3
2 (A)
(AL)
( (IX) + off)
2
1 (A)
(AL)
(Ri)
4
3
(dir) - d8
3
2
( (EP) ) - d8
4
3
( (IX) + off) - d8
3
2
(Ri) - d8
1
1 (SP)
(SP) + 1
1
1 (SP)
(SP) - 1
~
#
4
2 if Z = 1 then PC
PC + rel
2
4
2 if Z = 0 then PC
PC + rel
2
4
2 if C = 1 then PC
PC + rel
2
4
2 if C = 0 then PC
PC + rel
2
4
2 if N = 1 then PC
PC + rel
2
4
2 if N = 0 then PC
PC + rel
2
4
2 if V
N = 1 then PC
2
4
2 if V
N = 0 then PC
2
5
3 if (dir : b) = 0 then PC
5
3 if (dir : b) = 1 then PC
3
1 (PC)
(A)
4
3 (PC)
ext
7
1 vector call
6
3 subroutine call
3
1 (PC)
(A) , (A)
6
1 return from subroutine
8
1 return from interrupt
~
#
4
1 ((SP))
(A), (SP)
3
1 (A)
((SP)), (SP)
4
1 ((SP))
(IX), (SP)
3
1 (IX)
((SP)), (SP)
1
1 No operation
1
1 (C)
0
1
1 (C)
1
1
1 (I)
0
1
1 (I)
1
FUJITSU SEMICONDUCTOR LIMITED
Operation
Operation
PC + rel
PC + rel
PC + rel
PC + rel
(PC) + 1
Operation
(SP) - 2
(SP) + 2
(SP) - 2
(SP) + 2
MB95630H Series
TL TH AH N
Z
V
-
-
-
+
+
R
-
-
-
+
+
R
-
-
-
+
+
R
-
-
-
+
+
R
-
-
-
+
+
R
-
-
-
+
+
R
-
-
-
+
+
R
-
-
-
+
+
R
-
-
-
+
+
R
-
-
-
+
+
R
-
-
-
+
+
R
-
-
-
+
+
+
-
-
-
+
+
+
-
-
-
+
+
+
-
-
-
+
+
+
-
-
-
-
-
-
-
-
-
-
-
-
TL TH AH
N
Z
V
C
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+
-
-
-
-
-
-
+
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
dH
-
-
-
-
-
-
-
-
-
-
-
-
-
-
restore
TL TH AH
N
Z
V
-
-
-
-
-
-
-
-
dH
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
MN702-00009-2v0-E
C
OPCODE
-
64
-
65
-
67
-
66
-
68 to 6F
-
72
-
74
-
75
-
77
-
76
-
78 to 7F
+
95
+
97
+
96
+
98 to 9F
-
C1
-
D1
OPCODE
FD
FC
F9
F8
FB
FA
FF
FE
B0 to B7
B8 to BF
E0
21
E8 to EF
31
F4
20
30
C
OPCODE
-
40
-
50
-
41
-
51
-
00
R
81
S
91
-
80
-
90

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