Fujitsu 8FX Hardware Manual page 395

MB95630H Series
[bit3] INTE: Underflow interrupt request enable bit
This bit enables or disables the underflow interrupt.
bit3
Writing "0"
Writing "1"
[bit2] UF: Underflow interrupt request flag bit
This bit indicates whether an underflow has occurred in the 16-bit reload timer.
When read by the read-modify-write (RMW) type of instruction, this bit always returns "1".
bit2
Reading "0"
Reading "1"
Writing "0"
Writing "1"
[bit1] CNTE: Count enable bit
This bit enables or disables the counting operation of the 16-bit reload timer.
When "0" is written to this bit, the 16-bit reload timer stops counting.
When "1" is written to this bit, the 16-bit reload timer enters the start trigger wait state. When a start trigger is
input, the 16-bit reload counter starts counting.
bit1
Writing "0"
Writing "1"
[bit0] TRG: Software trigger bit
This bit enables using the software to start the 16-bit reload timer, and is valid only when the 16-bit reload
timer operation is enabled (CNTE = 1).
Writing "0" to this bit has no effect on operation.
When "1" is written to this bit, the value set to the 16-bit reload timer reload register ch. n
(TMRLRHn/TMRLRLn) is reloaded to the 16-bit reload timer timer register ch. n (TMRHn/TMRLn), and
then the 16-bit reload timer starts counting from the next count clock input.
Note: Writing "1" to this bit and the CNTE bit simultaneously starts the 16-bit reload timer counting
operation.
The read value of this bit is always "0". However, this bit keeps reading "1" from the point at which "1" is
written to this bit to start the 16-bit reload timer to the point at which the 16-bit reload timer starts counting.
bit0
Read access
Writing "0"
Writing "1"
MN702-00009-2v0-E
Disables the underflow interrupt.
Enables the underflow interrupt.
Indicates that no underflow has occurred in the 16-bit reload timer.
Indicates that an underflow has occurred in the 16-bit reload timer.
Clears this bit.
Has no effect on operation.
Stops the 16-bit reload timer counting operation.
Enables the 16-bit reload timer counting operation (start trigger wait state).
The read value is always "0".
Has no effect on operation.
The 16-bit reload timer starts counting from the next count clock input after the value set in
TMRLRHn/TMRLRLn is reloaded to TMRHn/TMRLn.
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER 20 16-BIT RELOAD TIMER
Details
Details
Details
Details
20.7 Registers
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