Fujitsu 8FX Hardware Manual page 363

MB95630H Series
● Invalidating the retrigger (RTRG bit in PCNTHn register = 0)
16-bit downcounter value
m
n
0
Software trigger
PPG
(Normal polarity)
PPG
(Inverted polarity)
● Validating the retrigger (RTRG bit in PCNTHn register = 1)
Counter value
m
n
0
Software trigger
PPG
(Normal polarity)
PPG
(Inverted polarity)
MN702-00009-2v0-E
Figure 19.6-1 When Retrigger Is Invalid in PWM Mode
Rising edge detected
(1)
(2)
(1)=n T ns
(2)=m T ns
Figure 19.6-2 When Retrigger Is Valid in PWM Mode
Rising edge detected
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER 19 16-BIT PPG TIMER
19.6 Operations and Setting Procedure Example
Trigger ignored
T : Count clock cycle
m: Value of PCSRH & PCSRL registers
n : Value of PDUTH & PDUTL registers
Restarted by trigger
(1)
(2)
T : Count clock cycle
(1)=n T ns
m: Value of PCSRH & PCSRL registers
(2)=m T ns
n : Value of PDUTH & PDUTL registers
Time
Time
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