Fujitsu 8FX Hardware Manual page 19

Major revisions in this edition
A change on a page is indicated by a vertical line drawn on the left of that page.
Page
17 CHAPTER 3 CLOCK
CONTROLLER
3.1 Overview of Clock Controller
■ Block Diagram of Clock Control-
ler
Figure 3.1-1
63 CHAPTER 4 RESET
4.1 Reset Operation
■ Reset Sources
● Low-voltage detection reset
(optional)
67 4.2.1 Reset Source Register
(RSRR)
■ Register Functions
68
Revisions (For details, see their respective pages.)
Corrected the connection between the main CR PLL clock
oscillator circuit and the PLLC control register (PLLC).
Added the following statement.
However, the LVD reset voltage selection ID register (LVDR)
of the low-voltage detection reset circuit is not reset by the
low-voltage detection reset.
Revised the following statement in details of the EXTS bit.
This bit reads "0" when read by a read access. A write access
(writing "0" or "1") to this bit sets it to "0".
A read access or a write access (writing "0" or "1") to this bit
sets it to "0".
Revised the following statement in details of the WDTR bit.
This bit reads "0" when read by a read access. A write access
(writing "0" or "1") to this bit sets it to "0".
A read access or a write access (writing "0" or "1") to this bit
sets it to "0".
Revised the following statement in details of the PONR bit.
This bit reads "0" when read by a read access. A write access
(writing "0" or "1") to this bit sets it to "0".
A read access or a write access (writing "0" or "1") to this bit
sets it to "0".
Revised the following statement in details of the HWR bit.
This bit reads "0" when read by a read access. A write access
(writing "0" or "1") to this bit sets it to "0".
A read access or a write access (writing "0" or "1") to this bit
sets it to "0".
Revised the following statement in details of the SWR bit.
This bit reads "0" when read by a read access. A write access
(writing "0" or "1") to this bit or a power on-reset sets it to "0".
A read access or a write access (writing "0" or "1") to this bit
or a power-on reset sets it to "0".
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