Fujitsu 8FX Hardware Manual page 169

MB95630H Series
Figure 11.7-2 Operation Diagram of Interval Timer Function (Continuous Mode)
Compare value
0xFF
0xE0
0x80
0x00
Tn0DR/Tn1DR value (0xE0)
IF bit
STA bit
*2
Counter clear
Timer output pin
*1: If the Tn0DR/Tn1DR data register value is modified during operation, the new value is used from the next active cycle.
*2: The counter is cleared and the data register settings are loaded into the comparison data latch whenever a match is detected during operation.
MN702-00009-2v0-E
Compare value Compare value
(0xE0) (0xFF)
Tn0DR/Tn1DR Tn0DR/Tn1DR value
modified (0xFF 0x80) *1
value modified
(0xE0 0xFF) *1
Cleared by program
Activated Matched
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER 11 8/16-BIT COMPOSITE TIMER
11.7 Operation of Interval Timer Function
Compare value
(0x80)
Matched Matched Matched Matched
(Continuous Mode)
Time
147