Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Technical Manual page 522

Cmos 32-bit single chip microcomputer
Table of Contents

Advertisement

VI SDRAM CONTROLLER BLOCK: SDRAM INTERFACE
CEFUNC1–CEFUNC0: #CE pin function selection (D[A:9]) / DRAM timing set-up register (0x48130)
Select an area for connection with an SDRAM.
Pin
#CE7/#SDCE0
#CE8/#SDCE1
Set CEFUNC = "00" to use areas 7/8 for SDRAMs or CEFUNC = "01" to use areas 13/14 for SDRAMs.
At cold start, CEFUNC is set to "00". At hot start, CEFUNC retains its status before being initialized.
A14IO: Areas 14–13 internal/external access selection (DD) / Access control register (0x48132)
A8IO: Areas 8–7 internal/external access selection (DA) / Access control register (0x48132)
A6IO: Area 6 internal/external access selection (D9) / Access control register (0x48132)
Select either internal access or external access for each area.
Write "1": Internal access
Write "0": External access
Read: Valid
Before the SDRAM controller can be used, A6IO must be set to "1" (internal access). Also, set A8IO to "1" to use
areas 7/8 for SDRAMs or set A14IO to "1" to use areas 13/14 for SDRAMs.
At cold start, these bits are set to "0" (external access). At hot start, these bits retain their status before being
initialized.
A6EC: Area 6 little/big endian method selection (D1) / Access control register (0x48132)
Select either little endian or big endian method for accessing each area.
Write "1": Big endian
Write "0": Little endian
Read: Valid
Set this register bit in the same way as set by LCDCEC (D0/0x39FFFD).
At cold start, this bit is set to "0" (little endian). At hot start, this bit retains its status before being initialized.
SDRAR1: Area 8/14 configuration (D6) / SDRAM area configuration register (0x39FFC0)
SDRAR0: Area 7/13 configuration (D7) / SDRAM area configuration register (0x39FFC0)
Set the area to be used for an SDRAM.
Write "1": For SDRAM
Write "0": For other devices
Read: Valid
SDRAMs can be connected to areas 7/8 or to areas 13/14. Write "1" to SDRAR0 to set area 7 or 13 for SDRAM
use. Similarly, write "1" to SDRAR1 to set area 8 or 14 for SDRAM use. Writing a "0" to either bit sets the
corresponding area to be used for devices other than an SDRAM.
At cold start, these bits are set to "0" (For a device not SDRAM). At hot start, these bits retain their status before
being initialized.
B-VI-2-26
Table 2.14 #CE Output Assignment
CEFUNC = "00"
CEFUNC = "01"
#CE7/#SDCE0
#CE13/#SDCE0
#CE8/#SDCE1
#CE14/#SDCE1
EPSON
CEFUNC = "1x"
#CE13/#SDCE0
#CE14/#SDCE1
(Default: CEFUNC = "00")
S1C33L03 FUNCTION PART

Advertisement

Table of Contents
loading

Table of Contents