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8 ELECTRICAL CHARACTERISTICS
Sync Timing
Frame Pulse
DRDY (MOD)
Data Timing
Shift Pulse
FPDAT[7:0]
Symbol
t
Frame Pulse setup to Line Pulse falling edge
1
t
Frame Pulse hold from Line Pulse falling edge
2
t
Line Pulse period
3
t
Line Pulse width
4
t
MOD delay from Line Pulse rising edge
5
t
Shift Pulse falling edge to Line Pulse rising edge
6
t
Shift Pulse falling edge to Line Pulse falling edge
7
t
Line Pulse falling edge to Shift Pulse falling edge
8
t
Shift Pulse period
9
t
Shift Pulse width low
10
t
Shift Pulse width high
11
t
FPDAT[7:0] setup to Shift Pulse falling edge
12
t
FPDAT[7:0] hold from Shift Pulse falling edge
13
t
Line Pulse falling edge to Shift Pulse rising edge
14
note) 1.Ts
= pixel clock period
2.t
= t
- 9 (Ts)
1min
3min
3.t
= (LDHSIZE[5:0] + 1)
3min
4.t
= HNDP[4:0]
6min
5.t
= HNDP[4:0]
7min
A-106
Line Pulse
Line Pulse
8-bit Single Color Panel AC Timing (Format 2)
Parameter
16 + (HNDP[4:0] + 4)
8 + 1 (Ts)
8 + 10 (Ts)
t
1
t
4
t
5
t
t
6
8
t
t
7
14
t
12
8 + 1 (Ts)
EPSON
t
2
t
3
t
9
t
t
11
10
t
13
1
2
Min.
Typ.
Max.
note 2
9
note 3
9
1
note 4
note 5
t
+2
14
2
1
1
1
1
23
S1C33L03 PRODUCT PART
Unit
(note 1)
Ts
Ts
Ts
Ts
Ts
Ts
Ts
Ts
Ts
Ts
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