Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Technical Manual page 109

SDRAM access cycle
BCLK
SDCKE H
A[23:0]
SDA10
#SDCEx
#SDRAS
#SDCAS
#SDWE (read)
D[15:0]
t
HDQM/
LDQM
#SDWE (write)
D[15:0]
Read: CAS latency = 2, burst length = 2
SDRAM mode-register-set cycle
BCLK
SDCKE H
A[23:0]
SDA10
#SDCEx
#SDRAS
#SDCAS
#SDWE
D[15:0]
HDQM/
LDQM
S1C33L03 PRODUCT PART
Bank active Read/write
t
AD
valid valid
(Bank, Row) (Column)
t
A10D
valid valid
t
CED1
t t
RASD1 RASD2
t
CASD1
t
WED1
DQMD1
t
WED1
t
WDD
valid
Write: single write
Mode register set nop
t
AD
valid
t
AD
valid
t t
CED1 CED2
t t
RASD1 RASD2
t t
CASD1 CASD2
t t
WED1 WED2
8 ELECTRICAL CHARACTERISTICS
nop nop
t
CED2
t
CASD2
t
WED2
t t
RDS RDH
valid
t
WED2
t
WDH
nop nop
EPSON
Precharge
valid
valid
valid
t
DQMD2
nop
A-1
A-8
A-93