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port with the system. For Active Energy Manager to detect the system, you must
configure the BMC IP address through BIOS. This is described in 6.1, "BMC
configuration options" on page 300.
Note: The IBM performance team observed a drop in performance when
power capping is used in a x3950 M2 multinode configuration. The setting is
therefore disabled and hidden if a multinode configuration is started. Power
capping is still an available option for single-node configurations.
Processor Performance States
The Advanced Configuration and Power Interface (ACPI) specification defines
three major controls (states) over the processor:
Processor power states (C-states)
Processor clock throttling (T-states)
Processor performance states (P-states)
These controls are used to achieved the desired balance of:
Performance
Power consumption
Thermal requirements
Noise-Level requirements
Processor power states
(C-states) are low-power idle states. This means the
operating system puts the processor into different quality low-power states
(which vary in power and latency), depending on the idle time estimate, if the
operating system is idle. C0 is the state where the system is used. C1 to Cn are
states that are then set to reduce power consumption. After the idle loop is
finished the system goes back to the C0 state.
Processor clock throttling
allows the platform to control and indicate the temperature at which clock
throttling, for example, will be applied to the processor residing in a given thermal
zone. Unlike other cooling policies, during passive cooling of processors,
operating system power management (OSPM) may take the initiative to actively
monitor the temperature in order to control the platform.
Processor performance states
states within the active or executing states. P-states allow the OSPM to make
trade-offs between performance and energy conservation. It has the greatest
effect when the states invoke different processor efficiency levels, as opposed to
a linear scaling of performance and energy consumption, so they are more
efficient than the power management features. Those P-states are placed in
Intel's SpeedStep technology, which knows one low and one maximum power
state only. More states are defined in the Enhanced Intel SpeedStep® (EIST)
(T-states) is a passive cooling mechanism, which
(P-states) are power consumption and capability
Chapter 3. Hardware configuration
101
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