Table of Contents
Advertisement
page 249. The FPGA is then reloaded on all nodes in the partition, then each
node is powered off and automatically powered on again (this can be 30-second
delays in this sequence). Removing any power cable to activate new updated
FPGA firmware is not required.
Example 5-1 Updating the FPGA code on a two-node complex
MNFPGA.EXE v2.60
------------------------------------
| Node 0
0x004E / 0x004F |
------------------------------------
Erasing the CPU Card SPI ROM
Programming CPU Card SPI ROM (with Verification)
Sector 7 <=> Page 54
CPU Card SPI ROM Programming is complete
Erasing the PCI Card SPI ROM
Programming PCI Card SPI ROM (with Verification)
Sector 4 <=> Page 54
PCI Card SPI ROM Programming is complete
MNFPGA.EXE v2.60
------------------------------------
| Node 1
0x604E / 0x604F |
------------------------------------
Erasing the CPU Card SPI ROM
Programming CPU Card SPI ROM (with Verification)
Sector 7 <=> Page 54
CPU Card SPI ROM Programming is complete
Erasing the PCI Card SPI ROM
Programming PCI Card SPI ROM (with Verification)
Sector 4 <=> Page 54
PCI Card SPI ROM Programming is complete
*************************************************************************
*
*
DC Power Cycle IS required to Reload the FPGAs
*
*
>>>>> Remove the diskette <<<<<
*
*
Press the [Enter] key to automatically Power off
*
the Athena System and power back ON within 38 seconds
*
>>> FPGAs will reload during the Power off phase
*************************************************************************
*
*
*
*
*
*
*
<<<
*
249
Chapter 5. Installation
Advertisement
Table of Contents
