IBM 88743BU - System x3950 E User Manual page 55

Planning, installing, and managing
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1066 MHz front-side bus (FSB)
The Tigerton and Dunnington Xeon MPs use two 266 MHz clocks, out of
phase with each other by 90°, and using both edges of each clock to transmit
data. This is shown in Figure 1-17.
266 MHz clock A
266 MHz clock B
Figure 1-17 Quad-pumped front-side bus
A quad-pumped 266 MHz bus therefore results in a 1066 MHz front-side bus.
The bus is 8 bytes wide, which means it has an effective burst throughput of
8.53 GBps. This can have a substantial impact, especially on TCP/IP-based
LAN traffic.
Intel 64 Technology (formerly known as EM64T)
Intel 64 Technology is a 64-bit extension to the industry-standard IA32 32-bit
architecture. Intel 64 Technology adds:
– A set of new 64-bit general purpose registers (GPRs)
– 64-bit instruction pointers
– The ability to process data in 64-bit chunks
Although the names of these extensions suggest that the improvements are
simply in memory addressability, Intel 64 Technology is, in fact, a fully
functional 64-bit processor.
The processors in the x3850 M2 and x3950 M2 include the Intel 64
Technology extensions from Intel. This technology is compatible with IA-32
software while enabling new software to access a larger memory address
space.
To realize the full benefit of this technology, you must have a 64-bit operating
system and 64-bit applications that have been recompiled to take full
advantage of this architecture. Existing 32-bit applications running on a 64-bit
operating system can also benefit from EM64T.
The Tigerton processors limit memory addressability to 40 bits of addressing.
Intel 64 Technology provides three distinct operation modes:
– 32-bit legacy mode
The first and, in the near future, probably most widely used mode will be
32-bit legacy mode
the
. In this mode, processors with Intel 64 Technology
Chapter 1. Technical overview
37

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