Circuit - Brother HL-2400C Service Manual

2.3.2

Circuit

(1) CPU block
(2) ASIC block
(3) ROM block
The ROM stores the CPU control program and font data. ROMs used are an
8Mbytes masked ROM, and a 2 Mbytes flash ROM which can be rewritten on
the board.
<Masked ROM>
<Flash ROM>
(4) DRAM block
DRAMs are used for the receiving buffer and the working area of the CPU.
The DRAM block contains eight 16Mbit EDO RAM, thus having 16MB
memory capacity in total.
Model name: MB86832-100 (SPARC lite), RISC CPU manufactured by
Fujitsu
Clock speed: 33.1776MHz (external) / 99.5328MHz (internal)
Cache memory: 8KB (Command cache) / 8KB (Data cache)
Appearance: 176-pin QFP
Model name: MF87F1610 manufactured by Fujitsu
Appearance: 240-pin QFP
Functions:
Controls CPU
Controls memory
Controls interrupts
Timer
External interfaces (Centronics, RS-232C, PCMCIA, MIO)
Engine interface (Engine control, Video signal control)
Supports Software
Access time: less than 120nsec.
Appearance: 42-pin DIP
Model name: MBM29F800T-120 manufactured Fujitsu
Access time: less than 120nsec.
Appearance: 48-pin TSOP
Model name: M5M41705CJ-6 manufactured Mitsubishi (or equivalent).
Type: 16Mbit EDO DRAM (4x4, 164,304bit)
Access time: less than 80nsec.
Appearance: 26-pin SOJ
IV-47