Figure 30. Expander Management (Em) Subsystem - Intel SC5650HCBRP Product Specification

6-HDD Expander SAS Hot Swap Backplane
interface or vendor-specific SMP implementation. As the SMP management application client,
the CPU (in Master mode) handles all SMP initiator requests and all SMP response functions.
5.1.1.1 Expander Management (EM) subsystem of SAS Expander
The Vitesse VSC7161* Serial Attached SCSI Expander embeds an Expander Management (EM)
subsystem that implements SMP dual-function target and initiator ports for in-band, vendor-
unique enclosure management control.
A 75 MHz v3000 CPU with 32 KB of zero wait-state internal SRAM is included in the Expander
Management (EM) subsystem. An external flash ROM stores the code for the v3000 CPU. In
Master mode HSBP adopts the v3000 CPU provides all Enclosure Management services using
the Vitesse* Software Development Kit (SDK).
The v3000 CPU communicates with other devices in the enclosure through several two-wire
serial interface ports, general purpose I/O, and LED drivers. It assembles enclosure status for
transmission to the host controller through vendor-unique SMP frames or SSP frames for in-
band SCSI Enclosure Services (SES) or through a two-wire serial interface port.
The following figure shows the architecture of Expander Management (EM) subsystem.
5.1.1.2 SAS Host Interface
Port 8 and Port 9 of the Vitesse VSC7161* SAS Expander are only used as SAS host interfaces.
Each port connects to the SAS controller on the server board or HBA via a separate 7-pin SAS
connector.
The following table defines pin-out of the 7-pin SAS connector:
94

Figure 30. Expander Management (EM) subsystem

Intel order number E81443-002
Intel® Server System SC5650HCBRP TPS
Revision 1.2