Figure 28. Turn On/Off Timing (Power Supply Signals) - Intel SC5650HCBRP Product Specification

Intel® Server System SC5650HCBRP TPS
Item
T Delay from PWOK de-asserted to output voltags (3.3V,
pwok_off
5V, 12V, -12V) dropping out of regulation limits.
T Duration of PWOK being in the de-asserted state
pwok_low
during an off/on cycle using AC or the PSON signal.
T Delay from 5VSB being in regulation to O/Ps being in
sb_vout
regulation at AC turn on.
T Time the 5VSB output voltage stays within regulation
5VSB_holdup
after loss of AC.
AC Input
Vout
T
AC_on_delay
T
sb_on_delay
PWOK
5VSB
T
sb_vout
PSON
AC turn on/off cycle

Figure 28. Turn On/Off Timing (Power Supply Signals)

4.2.2.12 Residual Voltage Immunity in Standby Mode
Each DC/DC converter is immune to any residual voltage placed on its respective output
(typically a leakage voltage through the system from standby output) up to 500mV. There is no
additional heat generated, nor is there any stress of any internal components with this voltage
applied to any individual output, or all outputs simultaneously. Residual voltage also does not
trip the power supply protection circuits during turn on.
Residual voltage at the power supply outputs for no-load condition does not exceed 100mV
when AC voltage is applied and the PSON# signal is de-asserted.
Revision 1.2
Description
T
vout_holdup
T
pwok_off
T
pwok_on
T
pwok_holdup
T
_
5VSB holdup
Intel order number E81443-002
Loading Minimum
1
100
50
70
T
pwok_low
T
T
sb_on_delay
pwok_on
T
pson_on_delay
PSON turn on/off cycle
Power Sub-system
Maximum Units
ms
ms
ms
1000
ms
T
pwok_off
T
pson_pwok
87