Running The Gty Ibert Demonstration; Connecting The Gty Transceivers And Reference Clocks - Xilinx Virtex UltraScale FPGA VCU1287 Getting Started Manual

Running the GTY IBERT Demonstration

The GTY IBERT demonstration operates one GTY Quad at a time. This section describes how
to test GTY Quad 124. The remaining GTY Quads can be tested following a similar series of
steps.

Connecting the GTY Transceivers and Reference Clocks

Review Figure 1-1
All GTY transceiver pins and reference clock pins are routed from the FPGA to a connector
pad that interfaces with Samtec Bulls Eye connectors. Review
the MGT Bulls Eye connector pad.
Attach the GTY Quad Connector
Before connecting the Bulls Eye cable assembly to the board, firmly secure the blue
elastomer seal provided with the cable assembly to the bottom of the connector housing if
it is not already inserted (see
Attach the Samtec Bulls Eye connector to GTY Quad 124
indexing pins on the bottom of the connector with the guide holes on the board. Hold the
connector flush with the board and fasten it by tightening the two captive screws.
X-Ref Target - Figure 1-21
VCU1287 IBERT Getting Started Guide
UG1203 (v2016.4) December 15. 2016
for the location of the GTY transceiver Quads on the VCU1287 board.
Figure 1-4).
Figure 1-21: Bulls Eye Connector Attached to Quad 124
www.xilinx.com
Chapter 1: VCU1287 IBERT Getting Started Guide
Figure 1-2
(Figure 1-21), aligning the two
X15560-121416
for the pinout of
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