Programmable Pre-Amplifier; Interface; Programmable Gain - Xilinx Spartan-3A User Manual

R
Finally, the ADC presents a 14-bit, two's complement digital output. A 14-bit, two's
complement number represents values between -2
scaled by 8192, or 2
See
pre-amplifier.
The reference design files provide more information on converting the voltage applied on
VINA or VINB to a digital representation (see

Programmable Pre-Amplifier

The LTC6912-1 provides two independent, inverting amplifiers with programmable gain.
The purpose of the amplifier is to scale the incoming voltage on VINA or VINB so that it
maximizes the conversion range of the DAC, namely 1.65 ± 1.25V.

Interface

Table 9-1
and SPI_SCK signals are shared with other devices on the SPI bus. The AMP_CS signal is
the active-Low slave select input to the amplifier.
Table 9-1: AMP Interface Signals

Programmable Gain

Each analog channel has an associated programmable gain amplifier (see
Analog signals presented on the VINA or VINB inputs on the J7 header are amplified
relative to 1.65V. The 1.65V reference is generated using a voltage divider of the 3.3V
voltage supply.
The gain of each amplifier is programmable from -1 to -100, as shown in
Table 9-2: Programmable Gain Settings for Pre-Amplifier
Spartan-3A/3AN Starter Kit Board User Guide
UG334 (v1.0) May 28, 2007
13
.
"Programmable Pre-Amplifier"
lists the interface signals between the FPGA and the amplifier. The SPI_MOSI
Signal FPGA Pin
SPI_MOSI AB14
AMP_CS W6
SPI_SCK AA20
AMP_SHDN W15
AMP_DOUT T7
A3
Gain
B3
0 0
-1 0
-2 0
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13
and 2
to control the GAIN settings on the programmable
"Related Resources," page
Direction
FPGA AMP Serial data: Master Output, Slave Input.
Presents eight-bit programmable gain
settings, as defined in
FPGA AMP Active-Low chip select. The amplifier gain is
set when the signal returns High.
FPGA AMP Clock
FPGA AMP Active-High shutdown, reset
FPGA AMP Serial data. Echoes previous amplifier gain
settings. Can be ignored in most applications.
A2 A1
B2 B1
0 0
0 0
0 1
Programmable Pre-Amplifier
13
-1. Therefore, the quantity is
77).
Description
Table 9-2.
Figure 9-2).
Table 9-2.
A0 Input Voltage Range
B0 Minimum Maximum
0
1 0.4 2.9
0 1.025 2.275
73