Programmable Logic Jtag Programming Options - Xilinx Zynq UltraScale+ ZCU216 User Manual

Table 16: Ethernet PHY LED Functional Description (cont'd)
Pin
Name Number
LED_0 63
The LED functions can be re-purposed with a LEDCR1 register write available through the PHYs
management data interface, MDIO/MDC. LED_2 is assigned to ACT (activity indicator) and
LED_0 indicates link established.
LED_1 (100BASE-T link established) is a separate LED DS8 located on the top side of the board
near the RJ45 P1 connector
For more Ethernet PHY details, see the TI DS83867 data sheet on the
website.
The detailed RFSoC connections for the feature described in this section are documented in the
ZCU216 board XDC file, referenced in

Programmable Logic JTAG Programming Options

[Figure 2, callouts 8 and 9]
ZCU216 JTAG chain:
• J24 USB micro AB connector connected to U29 FT4232HL USB-JTAG bridge
• J25 2x7 2 mm shrouded, keyed JTAG pod flat cable connector
The ZCU216 board JTAG chain is shown in the following figure.
UG1390 (v1.1) July 10, 2020
ZCU216 Board User Guide
Type
By default, this pin indicates that link is established.
S, I/O, PD
Additional functionality is configurable by means of LEDCR1[3:0] register bits.
(Figure 2, callout 16).
Appendix B: Xilinx Design
Chapter 3: Board Component Descriptions
Description
Texas Instruments
Constraints.
Send Feedback
www.xilinx.com
43