Single-Operand Instructions - Motorola MC68020 User Manual

8.2.11 Single-Operand Instructions

The single-operand instructions table indicates the number of clock periods needed for the
processor to perform the specified operation on the given addressing mode. Footnotes
indicate when it is necessary to add another table entry to calculate the total effective
execution time for the instruction. The total number of clock cycles is outside the
parentheses; the number of read, prefetch, and write cycles is given inside the
parentheses as (r/p/w). These cycles are included in the total clock cycle number.
Instruction
CLR
† CLR
NEG
*
NEG
NEGX
*
NEGX
NOT
*
NOT
EXT
NBCD
Scc
† Scc
TAS
† TAS
*
TST
*
Add Fetch Effective Address Time
†Add Calculate Effective Address Time
MOTOROLA
Dn
Mem
Dn
Mem
Dn
Mem
Dn
Mem
Dn
Dn
Dn
Mem
Dn
Mem
EA
M68020 USER'S MANUAL
Best Case Cache Case
0(0/0/0) 2(0/0/0)
3(0/0/1) 4(0/0/1)
0(0/0/0) 2(0/0/0)
3(0/0/1) 4(0/0/1)
0(0/0/0) 2(0/0/0)
3(0/0/1) 4(0/0/1)
0(0/0/0) 2(0/0/0)
3(0/0/1) 4(0/0/1)
1(0/0/0) 4(0/0/0)
6(0/0/0) 6(0/0/0)
1(0/0/0) 4(0/0/0)
6(0/0/1) 6(0/0/1)
1(0/0/0) 4(0/0/0)
12(1/0/1) 12(1/0/1)
0(0/0/0) 2(0/0/0)
Worst Case
3(0/1/0)
6(0/1/1)
3(0/1/0)
6(0/1/1)
3(0/1/0)
6(0/1/1)
3(0/1/0)
6(0/1/1)
4(0/1/0)
6(0/1/0)
4(0/1/0)
6(0/1/1)
4(0/1/0)
13(1/1/1)
3(0/1/0)
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