Motorola MC68020 User Manual page 106

S0
CLK
*
A31–A0
FC2–FC0
SIZ1–SIZ0
R/W
**
ECS
**
OCS
AS
DS
DSACK1
DSACK0
**
DBEN
D31–D0
IPL2–IPL0
BERR
HALT
* For the MC68EC020, A23–A0.
** This signal does not apply to the MC68EC020.
Figure 5-39. Late Bus Error with
5-58
Sw
S2 Sw
WRITE WITH BERR ASSERTED
M68020 USER'S MANUAL
S4
INTERNAL
PROCESSING
DSACK1/DSACK0
S0 S2 S4
STACK WRITE
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