Timing Requirements for PIC
TIMING REQUIREMENTS FOR PIC AS SLAVE (RD & WR CYCLES)
Num
1
2
3
AS* low to XRDY low (to insert wait)
4
Read Data Valid to local 7M low (S7)
5
6
TIMING REQUIREMENTS FOR PIC AS MASTER (RD & WR CYCLES)
Num
1
2
3
7M high (S4) to Data Valid Wr Cycle
Timing to Backplane
Num
1
2
Timing to PIC
Num
1
2
Data from 7M High(S4) on Wr to PIC
Num
1
Valid Data setup to Local 7M low(S7)
Characteristic
AS* low to SLAVE* Low
AS* high to SLAVE* high
AS* low to OVR* low
AS* high to OVR* high
Characteristic
7M high(S2) to AS* low
Address 23-1 Valid to AS* low
TIMING TO BACKPLANE
Characteristic
AS* Low to CDAC Low (Setup)
AS* High to CDAC High (Setup)
TIMING TO PIC (PIC IN SLAVE MODE)
Characteristic
Valid Address to AS* Low
TIMING TO PIC (PIC IN MASTER MODE)
Characteristic
38
Min
Max
Unit
0
35
ns
0
50
ns
0
60
ns
60
ns
0
50
ns
0
50
ns
Min
Max
Unit
0
67
ns
30
ns
0
ns
Min
Max
Unit
20
ns
20
ns
Min
Max
Unit
10
ns
35
ns
Min
Max
Unit
15
ns