Commodore Amiga A500 Technical Reference Manual page 121

Interrupt Mask
Register (R/W)
(1FFF9 / 7FFF9)
PC Interrupt Control
Register (R/W)
(1FFFB / 7FFFB)
Control Register (R/W)
(1FFFD / 7FFFD)
Keyboard
Register (R/W)
(1FFFF / 7FFFF)
You can mask each PC interrupt event separately by writing a " 1"
to the corresponding bit as shown below.
Bit no. Maskable Event (cmp. to Amiga interrupt status reg.)
0 /MINT
1 /GINT
2 /CRT1INT
3 /CRT2INT
4 ENKBKB
5 /LPT1INT
6 /COM2INT
7 /SYSINT
A PC interrupt can be forced by writing a "0" to the corresponding
bit of the lower nibble except the keyboard interrupt, which can be
asserted by writing a "1", as shown below:
Bit no. Asserted PC interrupt level
0 KBSTART (start keyboard shift-register)
1 IRQ3_a (forces interrupt 1RQ3)
2 IRQ3_b (forces interrupt IRQ3)
3 IRQ7
Bit 1 and bit 2 {lRQ3_a and IRQ_b) are externally "ORed" to IRQ3
All control function will be done by writing a "0" to the correspond-
ing bit Only bits 0 to 4 are used.
Bit no. usage
0 general interrupt enable to the AMIGA
1 general interrupt disable to the AMIGA
(default)
2 assert the PC reset line
3 negate all PC interrupt levels except the
keyboard interrupt
4 reset line printer BUSY (port 379 hex bit 7)
The line printer BUSY bit will be set by writing
a " 1" to bit 0 of port 37A hex from PC side.
Keyboard emulation is done by writing a character to this register
and then asserting a "1" to bit 0 of the PC INTERRUPT CONTROL
REGISTER.
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