Design Guidelines - Commodore Amiga A500 Technical Reference Manual

DESIGN GUIDELINES

FOR BACKPLANES
Collision Detection
Circuit
Bus Arbitration Logic
In this context, collisions are defined as any instance of two slaves
attempting to respond to the same bus cycle.
All backplanes must have a collision detect circuit. The reason is that
the PICs are auto-configurable and can be accidently instructed by
software to respond to overlapping address spaces. Without collision
detection, erroneous software can damage the hardware by causing
bus contention.
Collision detect works in the following way: As soon as a PIC knows
that it has been selected as the slave for this bus cycle, it asserts
SLAVE* low and holds SLAVE* low until the end of the bus cycle
(AS* going high).
The collision detect circuit (usually part of a PAL) detects whether
more than one slave is responding and, if so, asserts BERR*. All data
drivers on the expansion bus must be designed to enter high imped-
ance mode whenever BERR* is active. Because data drivers are not
turned on until S4 (ASDELAYED* active), BERR* will have disabled
the drivers before the contention can begin.
Note that in order to detect all cases of multiple slave response, the
circuit must watch A23-A19 for Amiga address spaces and also
watch SLAVEIN* from the next box out. See discussion of the ex-
ample schematic for specific PAL equations that implement collision
detect.
Because BERR* is listened to by all PICs, it will in some systems be
heavily loaded, so it should be driven with a hefty open collector or
tri-state driver. Each backplane should provide a 1000-ohm pull-up
resistor on BERR*.
The bus arbitration logic is based on the 68000 BR*. BG*. BGACK*
protocol as described in the 68000 manual. In order to avoid meta-
stable states in the backplane latches, all changes in state of the BR*
lines from the PICs must be clocked by the rising edge of 7M.
The example design gives our current recommended bus arbitration
logic. Refer to the ARBITRATE PAL equation in Table 3-3.
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