Commodore Amiga A500 Technical Reference Manual page 201

E-SPRITES (EIGHT (8)
CHANNELS)
F-DISK (ONE (1)
CHANNEL)
G-MEMORY REFRESH
(ONE (1) CHANNEL)
198
There are eight independent Sprite
controllers, each with its own DMA
channel and its own dedicated time slot
for DMA data transfer. Sprites are line
buffered objects that can move very fast
because of their position are controlled
by hardware registers and compactors.
Each Sprite has two 16 bit data registers
that define a 16 pixel wide Sprite with
four colors. Each has a horizontal
position register, a vertical start position
register and a vertical stop position
register. This allows variable vertical size
sprites.
The Sprite DMA controller fetches image
and position data automatically from
anywhere in 512K of memory.
Sprites can be run automatically in DMA
mode or they can be loaded and
controlled by the microprocessor.
Each Sprite can be reused vertically as
often as desired. Horizontal reusing is
also possible with microprocessor
control.
The disk controller, which is located
outside of the DMA controller, uses a
single DMA channel from the device. The
controller uses this DMA time slot for
data transfer and can read or write a
block of data up to 128K anywhere in
512K of memory.
The refresh controller uses a single DMA
channel with its own time slots. It places
RAS addresses on the memory address
bus (MAS) during these slots, in order to
refresh the dynamic RAM. Memory is
refreshed on every roster line.
During the DMA no data transfer actually
takes place. The register address bus
(RGA) is used to supply video
synchronizing codes. At this time, RASO*
and RAS1 * are low and CASU* and
CASL* are inactive.