Commodore Amiga A500 Technical Reference Manual page 168

Sector Format
Error Recovery
Philosophy
Figure 5.1 describes the format of a typical sector.
SYNC1 A1 FD HEADER WRITE SPLICE SYNC 2 A1 F8 DATA 4 BYTE ECC
Note: 1. Address Mark is a Hex 1 with a missing clock pulse.
2. SYNC field 1 is comprised of 16 bytes of zeros.
3. SYNC field 2 is comprised of 15 bytes of zeros.
Extensive measures have been taken in the design of the controller
to insure reliable data. Selectable precompensation circuitry and a
sophisticated data seperator with two tracking rates are a few
examples. Additional effort has been made to reduce the probability
of miscorrection (of having bad data flagged as corrected) through
design and options made available to the systems integrator.
In a write operation the controller only precomps the unique combi-
nations of data that might cause crowding conditions on the disk.
Shifting data early or late by 12 nsec is done to retain as much of
the 50 nsec data window as is possible. This reduces the probability
or errors occurring.
In a read operation the data seperator phase lock loop (PLL)
provides two tracking rates, a high and a low, which allows for
quick synchronization with the header address in the first case and
stable data transfer in the second. The controller only contributes a
maximum of 6 nsec (typically 3 nsec) of window error out of the
allowable error window of 50 nsec. This allows the disk drive to
have up to 44 nsec of jitter before error recovery/correction is
needed.
The controller uses a 32-bit error correction code that enables an
error correction span of up to 11 bits. This computer-generated
code is considered superior to fire codes because it substantially
reduces the chances of mis- correction while providing the full 11
-bit correction span.
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Figure 5.1
Typical Sector Format
4 BYTE HEADER
BYTE 1 = HEAD #
BYTE 2 = TRACK ADDRESS
BYTE 3 = SECTOR #
BYTE 4 = CRC
512 BYTES
ADDRESS MARK