Orban Optimod-FM 8300 Operating Manual page 251

Digital audio processor
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OPTIMOD-FM DIGITAL
GPIRQ10
GPIRQ11
GPIRQ12
GPIRQ15
GPIRQ14
SA23
SA22
SA21
SA20
SA19
SA18
/DACK0
SA17
DRQ0
/DACK5
DRQ5
SD8
/DACK6
SD9
DRQ6
SD10
/DACK7
SD11
DRQ7
SD12
SD13
SD14
SD15
+5VD
A1a
PC-104 Pinouts
A
B
A1
/CHCHK
B1
Ground
SD7
A2
SD7
B2
RESDRV
SD6
A3
SD6
B3
+5v.
A4
SD5
SD5
B4
IRQ9
SD4
A5
SD4
B5
-5v.
A6
SD3
SD3
B6
DRQ2
N/C
SD2
A7
SD2
B7
-12v.
SD1
A8
SD1
D
C
B8
/ENDXFR
N/C
A9
SD0
SD0
D0
B9
Ground
+12v.
C0
A10
Ground
CHRDY
D1
/MCS16
(Key)
C1
A11
/SBHE
AEN
D2
B11
/IO16
/SMWTC
SA19
C2
A12
LA23
SA19
D3
B12
IRQ10
/SMRDC
SA18
C3
A13
LA22
SA18
D4
B13
IRQ11
/IOWC
C4
A14
SA17
LA21
SA17
D5
B14
IRQ12
/IORC
SA16
C5
A15
LA20
SA16
D6
B15
IRQ15
/DACK3
N/C
C6
A16
SA15
LA19
SA15
D7
B16
IRQ14
DRQ3
N/C
C7
A17
SA14
LA18
SA14
D8
B17
/DACK0
/DACK1
SA13
C8
A18
LA17
SA13
D9
B18
DRQ0
DRQ1
C9
A19
SA12
/MEMRD
SA12
D10
B19
/DACK5
/REFRESH
SA11
C10
A20
/MEMWR
SA11
D11
B20
DRQ5
CLK
N/C
SA10
C11
A21
SD8
SA10
D12
B21
/DACK6
IRQ7
C12
A22
SA9
SD9
SA9
D13
B22
DRQ6
IRQ6
SA8
C13
A23
SD10
SA8
D14
B23
/DACK7
IRQ5
C14
A24
SA7
SD11
SA7
D15
B24
DRQ7
IRQ4
SA6
C15
A25
SD12
SA6
D16
B25
+5V.
IRQ3
SA5
C16
A26
SD13
SA5
D17
B26
/MASTER16
/DACK2
N/C
C17
A27
SA4
SD14
SA4
D18
B27
Ground
TC
SA3
C18
A28
SD15
SA3
D19
B28
Ground
BALE
A29
SA2
(Key)
SA2
B29
+5v.
SA1
A30
SA1
B30
OSC
SA0
A31
SA0
B31
Ground
A32
Ground
B32
Ground
GPIRQ9
GPIRQ7
1
1
1
GPIRQ6
2
2
2
GPIRQ5
GPIRQ4
GPIRQ3
/MEMCS16
2-1B
/MEMWR
2-1B
/MEMRD
2-1B
/SMEMWR
3-7C
/SMEMRD
3-7C
/SBHE
TV66
/GPIOCS
2-1B
/GPIOCS16
2-1B
/GPIOWR
3-6D, 2-1A
/GPIORD
3-6D, 2-1A
RSTDRV
3-7C, 2-1B
GPRDY
TV67
GPAEN
2-1A, 3-7C
GPTC
TV68
GPALE
TV69
/DACK1
3-7C
DRQ1
3-7C
JTAG_TRIG
JTAG_BR/TC
JTAG_TMS
JTAG_TDI
JTAG_TCK
/RING2
TV75
/DCD2
TV76
/DSR2
TV77
/CTS2
/RI1
/DCD1
/DSR1
TV2
/CTS1
CPU_+3.3V
4-8B
SSI_CLK
3-7C
CPU_+2.5V
4-8B
TV3
Rsvd_2
TV72
18.432MHz
3-7D, 2-1B
36.864MHz
3-7D
24.576MHz
3-7D, 2-1B
Rsvd_3
TV73
CLK_TIME/TEST
TV82
Rsvd_6
TV80
Rsvd_7
TV81
IDE_DREQ
TV83
IDE_/DACK
TV84
AUX_COMM
2-1B, 3-7D
AUX_PATCH
2-1B
+5VD
GPIRQ(3..15)
1
1
1
SA(0..25)
2-1A, 3-7B
2
2
2
SD(0..15)
3-6D, 2-1A
Revision History:
ECO#
DATE
REV
DESCRIPTION
#2984
06/19/02
01
Release to Production
#3022
12/19/02
Changed Power Supply connector
02
#3033
01/13/03
Implemented Brian's hit list
03
#3077
05/27/03
04
Implemented Manufacturing's hit list
#3198
07/21/04
Change Value R76 (Updated concurrently w/ ECO #3204)
05
#3204
07/21/04
8500 Mods (backlight ckt, /_IO_RESET signal, populate U3)
06
JTAG_TRIG
TV85
A1b
JTAG_STOP/TX
TV86
JTAG_CMD/ACK
TV87
E
F
JTAG_/TRST
E1
F1
E2
F2
JTAG_TDI
JTAG_TDO
JTAG_TDO
E3
F3
JTAG_/TRST
JTAG_TMS
E4
F4
JTAG_TCK
E5
F5
E6
F6
TV88
/DTR2
E7
F7
TV74
(Reserved) N/C
/RTS2
JTAG_BR/TC
E8
F8
E9
F9
SIN2
SOUT2
E10
F10
/DTR1
E11
F11
CPU Module JTAG Port
E12
F12
/RTS1
SIN1
E13
F13
E14
F14
SOUT1
E15
F15
SSI_DI
E16
F16
3-7C
SSI_DO
E17
F17
3-7C
E18
F18
Rsvd_1
E19
F19
TV71
E20
F20
Rsvd_0
TV70
E21
F21
============= "Accomodation Provisions" ===========
E22
F22
Default
Default
/GPCS1
GPIRQ15
E23
F23
TV30
TV41
/GPCS2
GPIRQ14
E24
F24
TV31
TV42
/GPCS3
E25
F25
GPIRQ12
TV32
TV43
/GPCS4
GPIRQ11
E26
F26
TV33
TV44
Patch 4
/GPCS5
E27
F27
GPIRQ10
Patch 3
TV34
TV45
/GPCS6
GPIRQ9
E28
F28
TV35
TV46
/GPCS7
GPIRQ7
E29
F29
TV36
TV47
E30
F30
PATCH1
GPIRQ6
TV37
GPIRQ4
TV48
PATCH2
GPIRQ5
E31
F31
TV38
GPIRQ3
TV49
E32
F32
PATCH3
GPIRQ4
Patch 1
TV39
GPIRQ10
TV50
PATCH4
GPIRQ3
TV40
GPIRQ11
TV51
Patch 2
Base Board Schematic:
CPU Module Interface
(version 62165.000.06)
6-33
TECHNICAL DATA
62165.000.06
DONE
CHECKED
WRS
WRS
WRS
WRS
WRS
WRS
WRS
BC
WRS
WRS
J13
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
+5VD
TV60
TV61
TV62
/DACK0
TV52
DRQ0
TV53
/DACK5
TV54
DRQ5
TV55
/DACK6
TV56
DRQ6
TV57
/DACK7
TV58
DRQ7
TV59
TV63
TV64
TV65
Sheet 2 of 4

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