Local Bus Memory Map - Motorola MVME167 Series Installation Manual

Address
Devices Accessed
Range
$00000000 - User Programmable
DRAMSIZE (Onboard DRAM)
DRAMSIZE - User Programmable
$FF7FFFFF (VMEbus)
$FF800000 - ROM
$FFBFFFFF
$FFC00000 - reserved
$FFDFFFFF
$FFE00000 - SRAM
$FFE1FFFF
$FFE20000 - SRAM (repeated)
$FFEFFFFF
$FFF00000 - Local I/O Devices
$FFFEFFFF (Refer to next table)
$FFFF0000 - User Programmable
$FFFFFFFF (VMEbus A16)
Notes
1. Onboard EPROM appears at $00000000 - $003FFFFF following a local bus
reset. The EPROM appears at 0 until the ROM0 bit is cleared in the
VMEchip2. The ROM0 bit is located at address $FFF40030 bit 20. The
EPROM must be disabled at 0 before the DRAM is enabled. The VMEchip2
and DRAM map decoders are disabled by a local bus reset.
2. This area is user-programmable. The suggested use is shown in the table.
The DRAM decoder is programmed in the MEMC040 or MCECC chip, and
the local-to-VMEbus decoders are programmed in the VMEchip2.
3. Size is approximate.
4. Cache inhibit depends on devices in area mapped.
5. This area is not decoded. If these locations are accessed and the local bus
timer is enabled, the cycle times out and is terminated by a TEA signal.
Table 2-5. Local Bus Memory Map
Port
Size
D32
D32/D16
D32
--
D32
D32
D32-D8
D32/D16
Software
Size Cache
Inhibit
DRAMSIZE N
3GB ?
4MB N
2MB --
128KB N
896KB N
1MB Y
64KB ?
Memory Maps
Notes
1, 2
3, 4
1
5
--
--
3
2, 4
2-25
2