Analog Devices ADSP-21020 Specification Sheet page 18

ADSP-21020
Memory Read
Parameter
Timing Requirement:
t Address, Select to Data Valid
DAD
t xRD Low to Data Valid
DRLD
t Data Hold from Address, Select
HDA
t Data Hold from xRD High
HDRH
t xACK Delay from Address
DAAK
t xACK Delay from xRD Low
DRAK
t xACK Setup before CLKIN High
SAK
t xACK Hold after CLKIN High
HAK
Switching Characteristic:
t Address, Select to xRD Low
DARL
t xPAGE Delay from Address, Select
DAP
t CLKIN High to xRD Low
DCKRL
t xRD Pulse Width
RW
t xRD High to xRD, xWD Low
RWR
NOTES
*DT = t – 50 ns
CK
x = PM or DM; Address = PMA23-0, DMA31-0; Data = PMD47-0, DMD39-0; Select = PMS1-0, DMS3-0.
K/B/T Grade K/B/T Grade B/T Grade
20 MHz 25 MHz
Min Max Min Max
37 27
24 18
0 0
–1 –1
27 18
15 10
14 12
0 0
8 4
1 1
16 26 13 24
26 20
17 13
–18–
K Grade
30 MHz 33.3 MHz Frequency Dependence*
Min Max Min Max Min
20 17
13 11
0 0
–1 –1
12 9
6 5
10 9 14 + DT/4
0 0
2 0 8 + 3DT/8
1 1
12 22 11 21 16 + DT/4 26 + DT/4
15 13 26 + 5DT/8
11 9 17 + 3DT/8
Max Unit
37 + DT ns
24 + 5DT/8 ns
ns
ns
27 + 7DT/8 ns
15 + DT/2 ns
ns
ns
ns
ns
ns
ns
ns
REV. C