Analog Devices ADSP-21020 Specification Sheet page 17

External Memory Three-State Control
Parameter
Timing Requirement:
t xTS, Setup before CLKIN High
STS
t xTS Delay after Address, Select
DADTS
t xTS Delay after XRD, XWR Low
DSTS
Switching Characteristic:
t Memory Interface Disable before
DTSD
CLKIN High
t xTS High to Address, Select Enable
DTSAE
NOTES
*DT = t – 50 ns.
CK
xTS should only be asserted (low) during an active memory access cycle.
Memory Interface = PMA23-0, PMD47-0, PMS1-0, PMRD, PMWR, PMPAGE, DMA31-0, DMD39-0, DMS3-0, DMRD, DMWR, DMPAGE.
Address = PMA23-0, DMA31-0. Select = PMS1-0, DMS3-0.
x = PM or DM.
CLKIN
PMTS, DMTS
xRD, xWR
ADDRESS,
SELECTS
DATA
REV. C
K/B/T Grade K/B/T Grade B/T Grade
20 MHz 25 MHz
Min Max Min
14 50 12
28
16
0 –2
0 0
t
STS
t
DADTS
t
t
DTSD
DSTS
Figure 9. External Memory Three-State Control
–17–
K Grade
30 MHz 33.3 MHz Frequency Dependency*
Max Min Max Min Max Min
40 10 33 9 30
19 13 10
11 7 6
–4 –5
0 0
t
STS
t
DTSAE
ADSP-21020
Max Unit
14 + DT/4 t ns
CK
28 + 7DT/8 ns
16 + DT/2 ns
DT/4 ns
ns