Register Assignment And Instruction Set Of The Adc-Module - Dalsa 1M28-SA User Manual

46
Register 24-31 (ROI = Region Of Interest)
Registers 24-31 are used to define a region of interest. See section 1.8 Region of Interest (ROI
Mode on page 20 for details. The coordinates of the corners of the ROI are written and take effect
at the beginning of the next frame. Invalid values must be prevented via software. Value x
y >y
0
x , y
0
x , y
1
When changing the ROI, note that some framegrabbers expect defined line and row settings and
that these values must be updated in the corresponding files.
Register 32 (Line Pause)
This register stores the line pause value. It is also defined in increments of the pixel clock. Valid
line pause values are between 5 (1M28 and 1M75) or 8 (1M150) and 255. Default is 8.
When changing the line pause, note that some framegrabbers expect defined line pause settings
and these values must be updated in the corresponding files.
Register 33: Line Jump (and Pixel Jump)
This register contains the value for the interlace mode. The line counter is incremented by this
value. The lines in between are skipped.
Register 47: RAM Bank Selection
The RAM banks in the FPGA are selected with this register.
Registers 48-63: Data for 16 x 8 RAM Banks
RAM banks have been implemented for internal parameters not used constantly by state machines.
3.5 Register Assignment and Instruction Set of
the ADC-Module
The communication is just like the sensor module's communication. To select the ADC module,
you must write to register 0EH of the sensor module. Writing to this register again resets the flag,
selecting the sensor module instead of the ADC module.
Table 21 shows the register assignment of the ADC module.
When the camera uses an external master clock MCLK, the ADC module is not accessible via the
RS232 interface because the baud rate is directly derived from the PIXEL_CLK. To circumvent
this, the camera must first be set into the master mode after which the register and the LUT of the
ADC module are accessible. After accessing the ADC module, the camera must be reset to slave
mode, where the external clock is used.
03-32-00525-04
PRELIMINARY
, are ignored by the camera. For full resolution:
1
= 0, 0
0
= 1023, 1023
1
1M28, 1M75, and 1M150 User's Manual
>x , or
0 1
DALSA