Appendix A. Watch-Dog Timer - IEI Technology Rocky-3702EV User Manual

Appendix A. Watch-Dog Timer

The WatchDog Timer is provided to ensure that standalone
systems can always recover from catastrophic conditions that
cause the CPU to crash. This condition may have occurred by
external EMI or a software bug. When the CPU stops working
correctly, hardware on the board will either perform a hardware
reset (cold boot) or a Non-Maskable Interrupt (NMI) to bring
the system back to a known state.
Two I/O ports control the WatchDog Timer :.
443 (hex) Read
043 (hex) Read
To enable the WatchDog Timer, a read from I/O port 443H
must be performed. This will enable and activate the countdown
timer which will eventually time-out and either reset the CPU or
cause a NMI, depending on the setting of JP7. To ensure that
this reset condition does not occur, the WatchDog Timer must
be periodically refreshed by reading the same I/O port 443H.
This must be done within the time-out period that is selected by
jumper group JP8.
A tolerance of at least 30% must be maintained to avoid
unknown routines within the operating system (DOS),
such as disk I/O that can be very time-consuming.
Therefore, if the time out period has been set to 10
seconds, the I/O port 443H must be read within 7
seconds.
Note: when exiting a program it is necessary to disable the WatchDog
Timer, otherwise the system will reset.
Enable to refresh the WatchDog
Timer.
Disable the WatchDog Timer.
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