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Development Mezzanine Card:
Test Data Input—this is the serial input pin for instructions as well as test and programming
CPLD_TDI:
data. Data is shifted in on the rising edge of TCK.
CPLD_TDO:
Test Data Output—this is the serial data output pin for instructions as well as test and pro-
gramming data. Data is shifted out on the falling edge of TCK.
CPLD_TMS:
Test Mode Select—this input pin provides the control signal to determine the transitions of
the TAP controller state machine. Transitions within the state machine occur at the rising
edge of TCK. Therefore, TMS must be set up before the rising edge of TCK and also evalu-
ated on the rising edge of TCK.
DMC JUMPERS AND LEDS
There are a total of five jumper pairs on the DMC. Pins 9 and 10 are spare jumper posts. See
Fig. 10-6
0x18" on page 8-5.
Figure 10-6:
DMC Jumper
JP1:
The Ethernet configuration jumper (pins 1 and 2) is not used on the Pm8560.
JP2:
A shunt on pins 3 and 4 selects the 8-bit ROM socket as the boot device. So in order for the
socket to provide boot code, the DMC must be seated on the Pm8560 and the boot shunt
must be in place. If the shunt is not installed, the boot device is Pm8560 flash bank 1.
JP3:
Pins 5 and 6 are the serial ROM configuration jumper. If the JP3 shunt is installed, the
Pm8560 will not try to configure from the serial ROM.
JP4:
This jumper is not used on the Pm8560
Table 10-6:
DMC Jumper Port Assignments
DMC Pin:
—
52
53
—
for the jumper and LED location on the DMC. Reference the "Jumper Settings (JSR),
DMC Description:
Ethernet (JP1)
Boot device (JP2)
DMC SROM (JP3)
User defined (JP4)
10006609-03
DMC Jumpers and LEDs
Comments:
Not used on the Pm8560
Boot default is from soldered flash on the Pm8560
Default initialization is from Pm8560 MPC8560
Config ROM
Not used on the Pm8560
10-7
Pm8560 User's Manual
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Troubleshooting
