Reset Command - Emerson Pm8560 User Manual

Programmable Logic Device:
PLD Register Summary
Front Panel Reset (POR_RST)
FPPB:
Set to 1 when the front panel switch caused a reset.

Reset Command

The write-only Reset Command register forces one of several types of resets, as shown
below. A reset sequence is first initiated by writing a one to a single valid bit, then the PLD
performs that particular reset, and the bit is automatically cleared.
Register 8-9: Reset Command (RCR), 0x24
7 6 5 4 3 2 1 0
CPUHR reserved FRMR MTSSR PMCRO I2CR FLR GBR
CPUHR: CPU Hard Reset
A CPU hard reset also causes resets to the framer, MT9045, flash, GbE. and PMC reset out
(when PROE bit 6 is set).
0 No reset (default)
1 Reset
FRMR: Framer Reset
0 No reset (default)
1 Reset
MTSSR: MT9045 System Synchronizer Reset
0 No reset (default)
1 Reset
PMC Reset Out
PMCRO:
This bit allows software to reset the Pm8560 based on the values set in PROE bits [5:0].
0 No reset (default)
1 Reset
2
I2CR: I C Reset
2
This will reset both I C ports.
0 No reset (default)
1 Reset
FLR: Flash Reset
0 No reset (default)
1 Resets on-board flash to a known state
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10006609-03 Pm8560 User's Manual