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TDM Interface:
Receive Side System Data (links 1-8) The processed data stream is an output to MPC8560.
RSD:
RSFS:
Receive Side System Frame pulse (links 1-8) In T1/J1 receive clock master mode, RSFSn
outputs the pulse; T1/J1 receive clock slave mode, RSFSn inputs the pulse. In E1 receive
clock master mode, RSFSn outputs the pulse; in E1 receive clock slave mode, RSFS inputs
the pulse.
TSCK:
Transmit Side System Clock (links 1-8) In transmit clock master mode, the TSCKn outputs
a 1.544 MHz (T1/J1)/2.048 MHz (E1) clock. In transmit clock slave mode, the TSCKn inputs a
1.544 MHz (T1/J1 only), 2.048 or 4.096 MHz clock.
TSD:
Transmit Side system Data (links 1-8) The data stream from MPC8560 is an input.
Transmit Side System Frame pulse (links 1-8) In T1/J1 transmit clock master mode, TSFSn
TSFS:
outputs the pulse; in T1/J1 transmit clock slave mode, RSFSn inputs the pulse. In E1 transmit
clock master mode, TSFSn outputs the pulse; in E1 transmit clock slave mode, TSFS inputs
the pulse.
FRAMER WAVEFORM SHAPE
The framer provides a mechanism to tune the transmitted waveform. This mechanism is
described in the IDT82P2288 data sheet (see the technical reference in
"User-Programmable Arbitrary Waveform." It consists of loading values to describe the
wave form into the framer RAM and a scale value into a chip register. This procedure is
repeated for each of the ports being used. The data sheet defines the values to load into
RAM as a series of tables numbered from 62 to 73. Which table and scale value to use is dic-
tated by the mode (T1 or E1) and the Rear Transition Module (RTM) ports.
fies the table and scale value to use based on these two parameters.
Table 6-1:
Transmit Waveform Value Tables
Emerson RTM (Configuration):
KatanaP16 (AdvancedTCA 16 port, 4x4)
TMcSpanP8E (cPCI 8 port, default)
Note:
Scale values for other Emerson RTMs are available upon request, contact Technical Support.
FRAMER INTERRUPT MECHANISM
Special events in the framer are indicated by means of a single interrupt output (INT* pin
T11) with programmable characteristics (open drain). This requests the processor to read
status information from the framer, or to transfer data from/to the framer. Since only one
INT* request output is provided, the processor must determine the cause of an interrupt by
reading the framer's Interrupt Status registers (ISR0 and ISR1). That means the interrupt at
pin INT* and the interrupt status bits are reset by reading the interrupt status registers.
Framer Waveform Shape
10006609-03
T1 Mode:
E1 Mode:
Table 64, Scale 0x3F
Table 63, Scale 0x25
Table 64, Scale 0x2C
Table 63, Scale 0x26
Pm8560 User's Manual
), section
Table 1-3
identi-
Table 6-1
6-5
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Troubleshooting
