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A
S
PECIFICATIONS
Hardware
Memory
Bus interface
PCI master
PCI slave
Interrupts
LED
Board dimensions
Power requirements
16 Kb serial EEPROM
128 KB SRAM
315 Cells on chip buffer
PCI Local Bus Specification,
Revision 2.0
PCI Compliance Checklist
32-bit zero wait state master
32-bit bus
Supports up to 13 dword bursts
Supports bus master
scatter-gather DMAs
Memory read line support
Memory read multiple support
I/O, memory, and configuration
cycles
Interrupt pin: INTA#
Lit when there is an active link to
the ATM switch.
Single slot, half-size, 32-bit PCI card
Length: 6.15 in. (15.62 cm)
Width: 4.20 in. (10.67 cm)
10 W (1.5 A @ 5 V, .02 A @ 12V)
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