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Electrical Specifications—Intel
Table 8.
AGTL+ Signal Group DC Specifications (Sheet 2 of 2)
V
IH
V
IL
V
OH
R
TT
R
ON
I
LI
Cpad
Notes:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2.
V
IL
value.
3.
V
IH
value.
4.
V
IH
the signal quality specifications.
5.
This is the pull down driver resistance. Refer to processor I/O Buffer Models for I/V characteristics.
Measured at 0.31*V
6.
GTLREF should be generated from V
these specifications is the instantaneous V
7.
R
TT
0.31*V
characteristics.
8.
Specified with on die R
9.
Cpad includes die capacitance only. No package parasitics are included.
10.
R
TT
.
Table 9.
CMOS Signal Group DC Specifications
Symbol
V
CCP
V
IL
V
IH
V
OL
V
OH
I
OL
I
OH
I
LI
Cpad1
Cpad2
Notes:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2.
The V
3.
Refer to the processor I/O Buffer Models for I/V characteristics.
4.
Measured at 0.1*V
5.
Measured at 0.9*V
6.
For Vin between 0V and V
7.
Cpad1 includes die capacitance only for PWRGOOD. No package parasitics are included.
8.
Cpad2 includes die capacitance for all other CMOS input signals. No package parasitics are included.
January 2007
Order Number: 315876-002
®
®
Celeron
Processor 1.66 GHz/1.83 GHz
Input High Voltage
Input Low Voltage
Output High Voltage
Termination Resistance
Buffer On Resistance
Input Leakage Current
Pad Capacitance
is defined as the maximum voltage level at a receiving agent that is interpreted as a logical low
is defined as the minimum voltage level at a receiving agent that is interpreted as a logical high
and V
may experience excursions above V
OH
. R
(min) = 0.38*R
CCP
ON
is the on-die termination resistance measured at V
. R
is connected to V
CCP
TT
CCP
and R
TT
ON
for PREQ# is between 1.5kΩ and 6.0kΩ
Parameter
I/O Voltage
Input Low Voltage
CMOS
Input High Voltage
Output Low Voltage
Output High Voltage
Output Low Current
Output High Current
Leakage Current
Pad Capacitance
Pad Capacitance for CMOS
Input
referred to in these specifications refers to instantaneous V
CCP
.
CCP
.
CCP
. Measured when the driver is tristated.
CCP
GTLREF+100
V
CCP
-100
0
V
- 100
CCP
45
50
22.3
25.5
1.8
2.3
. However, input signal drivers must comply with
CCP
R
(typ) = 0.45*R
,
ON
TT
with a 1% tolerance resistor divider. The V
CCP
.
CCP
of the AGTL+ output driver. Measured at
OL
on die. Refer to processor I/O buffer models for I/V
are turned off.
Min
Typ
0.997
1.05
-0.1
0
0.7
1.05
-0.1
0
0.9
V
CCP
1.3
1.3
1.8
2.3
0.95
1.2
®
Intel
Celeron
V
+100
mV
3,6
CCP
GTLREF-100
mV
2,4
V
mV
CCP
Ω
55
7,10
28.7
W
± 100
µA
2.75
pF
R
(max) = 0.52*R
,
ON
.
TT
TT
referred to in
CCP
Max
Unit
Notes
1.102
V
0.33
V
2, 3
1.20
V
0.11
V
1.2
V
4.1
mA
4.1
mA
± 100
µA
2.75
pF
1.45
pF
.
CCP
®
Processor 1.66 GHz/1.83 GHz
6
5
8
9
1
2
2
2
4
5
6
7
8
DS
23
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