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Table 14.
CMOS Signal Group DC Specifications
Symbol
V
IL
V
IH
V
OL
V
OH
I
OL
I
OH
I
LI
I
LO
NOTES:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2. V
is defined as the voltage range at a receiving agent that will be interpreted as a logical low
IL
value.
3. The V
TT
4. V
is defined as the voltage range at a receiving agent that will be interpreted as a logical high
IH
value.
5. V
and V
IH
6. All outputs are open drain.
7. I
is measured at 0.10 * V
OL
8. Leakage to V
9. Leakage to V
2.7.3.1
GTL+ Front Side Bus Specifications
In most cases, termination resistors are not required as these are integrated into the
processor silicon. See
termination.
Valid high and low levels are determined by the input buffers by comparing with a
reference voltage called GTLREF.
reference voltage (GTLREF) should be generated on the system board using high
precision voltage divider circuits.
Table 15.
GTL+ Bus Voltage Definitions
Symbol
GTLREF_PU
GTLREF_PD
R
TT
COMP[3:0]
COMP8
NOTES:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2. GTLREF is to be generated from V
GTLEREF land).
3. R
is the on-die termination resistance measured at V
TT
4. COMP resistance must be provided on the system board with 1% resistors. See the applicable
platform design guide for implementation details. COMP[3:0] and COMP8 resistors are tied to
V
.
SS
30
Parameter
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
Output Low Current
Output High Current
Input Leakage Current
Output Leakage Current
referred to in these specifications refers to instantaneous V
may experience excursions above V
OH
I
TT.
OH
with land held at V
SS
with land held at 300 mV.
TT
Table 10
for details on which GTL+ signals do not include on-die
Parameter
GTLREF pull up resistor
GTLREF pull down resistor
Termination Resistance
COMP Resistance
COMP Resistance
TT
Min
-0.10
V
* 0.70
TT
-0.10
0.90 * V
1.70
1.70
N/A
N/A
.
TT
is measured at 0.90 * V
TT.
.
TT
Table 15
lists the GTLREF specifications. The GTL+
Min
Typ
124 * 0.99
124
210 * 0.99
210
45
50
49.40
49.90
24.65
24.90
by a voltage divider of 1% resistors (one divider for each
/3 of the GTL+ output driver.
TT
Electrical Specifications
Max
Unit
Notes
V
* 0.30
V
TT
V
+ 0.10
V
TT
V
* 0.10
V
TT
V
+ 0.10
V
TT
TT
4.70
mA
4.70
mA
± 100
µA
± 100
µA
.
TT
Max
Units
Notes
124 * 1.01
Ω
210 * 1.01
Ω
55
Ω
50.40
Ω
25.15
Ω
Datasheet
1
2, 3
3, 4, 5
3
3, 6,
5
3, 7
3,
7
8
9
1
2
2
3
4
4
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