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Table 8.
CMOS Signal Group DC Specifications
Symbol
V
I/O Voltage
CCP
V
Input Low Voltage CMOS
IL
V
Input High Voltage
IH
V
Output Low Voltage
OL
V
Output High Voltage
OH
I
Output Low Current
OL
I
Output High Current
OH
I
Input Leakage Current
LI
Cpad1
Pad Capacitance
Cpad2
Pad Capacitance for CMOS Input
NOTES:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2.
The V
referred to in these specifications refers to instantaneous V
CCP
3.
Measured at 0.1 *V
4.
Measured at 0.9 *V
5.
For Vin between 0 V and V
6.
Cpad1 includes die capacitance only for DPRSTP#, DPSLP#, PWRGOOD. No package parasitics are
included.
7.
Cpad2 includes die capacitance for all other CMOS input signals. No package parasitics are included.
Table 9.
Open Drain Signal Group DC Specifications
Symbol
V
Output High Voltage
OH
V
Output Low Voltage
OL
I
Output Low Current
OL
I
Output Leakage Current
LO
Cpad
Pad Capacitance
NOTES:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2.
Measured at 0.2 V.
3.
V
is determined by value of the external pull-up resistor to V
OH
4.
For Vin between 0 V and V
5.
Cpad includes die capacitance only. No package parasitics are included.
32
Parameter
.
CCP
.
CCP
. Measured when the driver is tristated.
CCP
Parameter
.
OH
Min
Typ
1.00
1.05
-0.10
0.00
0.7*V
V
CCP
CCP
-0.10
0
0.9*V
V
CCP
CCP
1.5
—
1.5
—
—
—
1.80
2.30
0.95
1.2
.
CCP
Min
Typ
V
–5%
V
CCP
CCP
0
—
16
—
—
—
1.80
2.30
.
CCP
§
Electrical Specifications
Max
Unit
Notes
1.10
V
0.3*V
V
CCP
V
+0.1
V
CCP
0.1*V
V
CCP
V
+0.1
V
CCP
4.1
mA
4.1
mA
±100
µA
2.75
pF
1.45
pF
Max
Unit
Notes
V
+5%
V
3
CCP
0.20
V
50
mA
2
±200
µA
4
2.75
pF
5
Datasheet
1
2
2
2
2
3
4
5
6
7
1
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