Power Management Overview; Versa S Series Interrupt-Level Assignments - NEC VERSA S Service Manual

1-10 Technical Information
Table Section 1-7 Versa S Series Interrupt-Level Assignments
Controller
Master/Slave
Master
Master
Master
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Master
Master
Master
Master
Master
*Industry standard locations

Power Management Overview

The Versa system uses power management features to prolong system battery life.
The CPU (SL Enhanced i486) implements a System Management Interrupt (SMI) function
that works transparently with the operating system and application software. When acti-
vated, the processor mode changes to real mode. Unique "SM-RAM" containing power
management software is mapped at address 30000h — 3FFFFh. This activity is inherent to
the system and does not require any adjustment to the operating system or application soft-
ware.
The power management program is located in ROM at location E8000h — EFFFFh. In on-
board DRAM, the software is physically allocated at the same location.
Use the System Configuration Utility to select specific power management options. For in-
formation on how to select these options, see Section 3, Power Management.
Priority Name
0 IRQ00
1 IRQ01
2 IRQ02
3 IRQ08
4 IRQ09
5 IRQ10
6 IRQ11
7 IRQ12
8 IRQ13
9 IRQ14
10 IRQ15
11 IRQ03
12 IRQ04
13 IRQ05
14 IRQ06
15 IRQ07
Device
Counter/Timer 1
Keyboard
Cascade for 8 to 15
Real-time Clock
VGA
Reserved
Reserved (PCMCIA)
PS/2 Mouse*
Math Coprocessor (built into CPU)
Hard Disk Controller
Reserved
COM2, COM4*
COM1, COM3*
Parallel Port 2
Diskette Drive Controller*
Parallel Port 1*