Holtek BS66F340C Manual page 181

BS66F340C/BS66F350C/BS66F360C
Touch A/D Flash MCU
Bit 1 IAMWU: I
0: Disable
1: Enable
This bit should be set to 1 to enable the I
or IDLE Mode. If the IAMWU bit has been set before entering either the SLEEP or
IDLE mode to enable the I
the application program after wake-up to ensure correction device operation.
Bit 0 RXAK: I
0: Slave receive acknowledge flag
1: Slave does not receive acknowledge flag
The RXAK flag is the receiver acknowledge flag. When the RXAK flag is "0", it
means that a acknowledge signal has been received at the 9th clock, after 8 bits of data
have been transmitted. When the slave device in the transmit mode, the slave device
checks the RXAK flag to determine if the master receiver wishes to receive the next
byte. The slave transmitter will therefore continue sending out data until the RXAK
flag is "1". When this occurs, the slave transmitter will release the SDA line to allow
the master to send a STOP signal to release the I
I C Bus Communication
2
Communication on the I
transmission, a data transmission and finally a STOP signal. When a START signal is placed on
the I C bus, all devices on the bus will receive this signal and be notified of the imminent arrival of
2
data on the bus. The first seven bits of the data will be the slave address with the first bit being the
MSB. If the address of the slave device matches that of the transmitted address, the HAAS bit in the
SIMC1 register will be set and an I
routine, the slave device must first check the condition of the HAAS and SIMTOF bits to determine
whether the interrupt source originates from an address match or from the completion of an 8-bit data
transfer completion or from the I
7-bit slave address has been transmitted, the following bit, which is the 8th bit, is the read/write bit
whose value will be placed in the SRW bit. This bit will be checked by the slave device to determine
whether to go into transmit or receive mode. Before any transfer of data to or from the I
microcontroller must initialise the bus, the following are steps to achieve this:
• Step 1
Set the SIM2~SIM0 bits to "110" and SIMEN bit to "1" in the SIMC0 register to enable the I
• Step 2
Write the slave address of the device to the I
• Step 3
Set the SIM interrupt and the corresponding Multi-function interrupt enable bits of the interrupt
control registers to enable the SIM interrupt and Multi-function interrupt.
Rev. 1.11
C Address Match Wake-up control
2
C address match wake up, then this bit must be cleared by
2
C Bus Receive acknowledge flag
2
C bus requires four separate steps, a START signal, a slave device address
2
C interrupt will be generated. After entering the interrupt service
2
C bus time-out occurrence. During a data transfer, note that after the
2
C bus address register SIMA.
2
181
C address match wake up from the SLEEP
2
C Bus.
2
November 09, 2023
C bus, the
2
C bus.
2