Holtek BS66F340C Manual page 12

3. For less pin-count package types there will be unbonded pins which should be properly configured to
avoid unwanted current consumption resulting from floating input conditions. Refer to the "Standby
Current Considerations" and "Input/Output Ports" sections.
Pin Description
The function of each pin is listed in the following table, however the details behind how each pin
is configured is contained in other sections of the datasheet. As the Pin Description table shows the
situation for the package with the most pins, not all pins in the table will be available on smaller
package sizes.
BS66F340C
Pin Name Function
PA0
PA0/SDO/ICPDA/
SDO
OCDSDA
ICPDA
OCDSDA
PA1
CTP0
PA1/CTP0/RX/SCK/SCL RX
SCK
SCL
PA2
PA2/SCS/CTCK1/
SCS
ICPCK/OCDSCK
CTCK1
ICPCK
OCDSCK
PA3
PA3/SCS/XT1
SCS
XT1
PA4
PA4/SDO/XT2
SDO
XT2
Rev. 1.11
BS66F340C/BS66F350C/BS66F360C
O/T
OPT I/T
PAWU
General purpose I/O. Register enabled pull-up and
PAPU ST CMOS
wake-up.
PAS0
PAS0 CMOS SIM SPI serial data output
—
ST CMOS ICP Data/Address pin
—
ST CMOS OCDS Data/Address pin, for EV chip only.
—
PAWU
General purpose I/O. Register enabled pull-up and
PAPU ST CMOS
wake-up.
PAS0
PAS0 CMOS CTM0 output
—
PAS0
ST UART RX serial data input
—
IFS1
PAS0
ST CMOS SIM SPI serial clock
IFS1
PAS0
ST NMOS SIM I 2 C clock line
IFS1
PAWU
General purpose I/O. Register enabled pull-up and
PAPU ST CMOS
wake-up.
PAS0
PAS0
ST CMOS SIM SPI slave select
IFS0
PAS0 ST CTM1 clock input
—
ST CMOS ICP Clock pin
—
ST OCDS Clock pin, for EV chip only.
— —
PAWU
General purpose I/O. Register enabled pull-up and
PAPU ST CMOS
wake-up.
PAS0
PAS0
ST CMOS SIM SPI slave select
IFS0
PAS0 LXT LXT oscillator pin
—
PAWU
General purpose I/O. Register enabled pull-up and
PAPU ST CMOS
wake-up.
PAS1
PAS1 CMOS SIM SPI data output
—
PAS1 LXT LXT oscillator pin
—
12
Touch A/D Flash MCU
Description
November 09, 2023