BS66F340C/BS66F350C/BS66F360C
Touch A/D Flash MCU
Register
Name
FC0
CFWEN
FC1
FC2
(BS66F350C/
BS66F360C)
FARL
FARH
(BS66F340C)
FARH
(BS66F350C)
FARH
(BS66F360C)
FD0L
FD0H
FD1L
FD1H
FD2L
FD2H
FD3L
FD3H
• FC0 Register
Bit
7
Name
CFWEN
R/W
R/W
POR
0
Bit 7
CFWEN: Flash Memory Erase/Write function enable control
0: Flash memory erase/write function is disabled
1: Flash memory erase/write function has been successfully enabled
When this bit is cleared to 0 by application program, the Flash memory erase/write
function is disabled. Note that this bit cannot be set high by application programs.
Writing a "1" into this bit will result in no action. This bit is used to indicate the Flash
memory erase/write function status. When this bit is set high by the hardware, it means
that the Flash memory erase/write function is enabled successfully. Otherwise, the
Flash memory erase/write function is disabled if the bit is zero.
FMOD2~FMOD0: Flash memory Mode selection
Bit 6~4
000: Write Mode
001: Block/Page Erase Mode
011: Read Mode
110: Flash memory Erase/Write function Enable Mode
Other values: Reserved
These bits are used to select the Flash Memory operation modes. Note that the "Flash
memory Erase/Write function Enable Mode" should first be successfully enabled
before the Erase or Write Flash memory operation is executed. When these bits are set
to "001", the "Block erase" mode is selected for BS66F340C while the "Page erase"
mode is selected for BS66F350C/BS66F360C.
Bit 3
FWPEN: Flash memory Erase/Write function enable procedure Trigger
0: Erase/Write function enable procedure is not triggered or procedure timer times out
1: Erase/Write function enable procedure is triggered and procedure timer starts to count
Rev. 1.11
7
6
5
FMOD2
FMOD1
FMOD0
D7
D6
D5
—
—
—
FA7
FA6
FA5
—
—
—
—
—
—
—
—
FA13
D7
D6
D5
D15
D14
D13
D7
D6
D5
D15
D14
D13
D7
D6
D5
D15
D14
D13
D7
D6
D5
D15
D14
D13
IAP Register List
6
5
FMOD2
FMOD1
FMOD0
R/W
R/W
R/W
0
0
43
Bit
4
3
2
FWPEN
FWT
D4
D3
D2
—
—
—
FA4
FA3
FA2
—
FA11
FA10
FA12
FA11
FA10
FA12
FA11
FA10
D4
D3
D2
D12
D11
D10
D4
D3
D2
D12
D11
D10
D4
D3
D2
D12
D11
D10
D4
D3
D2
D12
D11
D10
4
3
2
FWPEN
FWT
FRDEN
R/W
R/W
0
0
0
1
0
FRDEN
FRD
D1
D0
—
CLWB
FA1
FA0
FA9
FA8
FA9
FA8
FA9
FA8
D1
D0
D9
D8
D1
D0
D9
D8
D1
D0
D9
D8
D1
D0
D9
D8
1
0
FRD
R/W
R/W
0
0
November 09, 2023
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