Ethernet; Usb; Gpios; Uart Configuration - Enclustra Mars ZX2 User Manual

Parameter
Baud rate
Data
Parity
Stop
Flow control
Table 2: UART Configuration
2.1.7

Ethernet

The Ethernet MAC ENET 0 is mapped to MIO 16..27 and MIO 52..53 pins and is connected to the Microchip
(Micrel) KSZ9031 Ethernet PHY on the Mars ZX2 SoC module using an RGMII interface. The PHY can be
configured via the MDIO management interface on PHY address 3. Please note that the RGMII delays in
the Ethernet PHY need to be configured before the Ethernet interface can be used. Further details on
PHY delay configuration are given in the Gigabit Ethernet Application Note by Enclustra [9].
2.1.8

USB

The USB controller USB0 on MIO 28..39 pins is connected to a USB3320C USB 2.0 PHY.
In combination with the Mars ST3 base board this interface can be configured for USB host operation
only.
2.1.9

GPIOs

The unused MIO pins from the PS are available as GPIOs. For details on the MIO assignement refer to the
Multiplexed I/O (MIO) Pins section in the Mars ZX2 SoC module User Manual [3]. Check the connectivity
of the MIOs that provide user functionality with the Mars ST3 base board User Manual [4]
D-0000-489-003
Value
115'200
8 bit
None
1 bit
None
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