List of Figures
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Enable xilffs in Vitis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
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List of Tables
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UART Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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References
[1] Vivado Design Suite User Guide, Embedded Processor Hardware Design, UG898, Xilinx, 2019
[2] Zynq-7000 All Programmable SoC Embedded Design Tutorial, UG1165, Xilinx, 2015
[3] Mars ZX2 SoC Module User Manual
Ask Enclustra for details
[4] Mars ST3 Base Board User Manual
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[5] Enclustra Module Configuration Tool (MCT)
https://www.enclustra.com/en/products/tools/module-configuration-tool/
[6] FTDI FT_PROG Utility
https://ftdichip.com/utilities/#ft_prog
[7] Enclustra Build Environment
https://github.com/enclustra-bsp/bsp-Xilinx
[8] Enclustra I2C Application Note
https://github.com/enclustra/I2CAppNote
[9] Enclustra Gigabit Ethernet Application Note
https://github.com/enclustra/GigabitEthernetAppNote
[10] Enclustra Modules Heat Sink Application Note
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Version 2022.1_v2.0.1, 15.10.2022
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