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Enclustra Cosmos XZQ10 User Manual

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Cosmos XZQ10 System Board
Purpose
The purpose of this document is to present the characteristics of Cosmos XZQ10 system board to the user,
and to provide the user with a comprehensive guide to understanding and using the Cosmos XZQ10 system
board.
Summary
This document first gives an overview of the Cosmos XZQ10 system board followed by a detailed description
of its features and configuration options. In addition, references to other useful documents are included.
Product Information
Product
Document Information
Reference / Version / Date
Approval Information
Written by
Verified by
Approved by
User Manual
Code
CO-XZQ10
Reference
D-0000-450-001
Name
DIUN
GKOE, SSCH
DIUN
Enclustra GmbH – Räffelstrasse 28 – CH-8045 Zürich – Switzerland
Name
Cosmos XZQ10 System Board
Version
01
Position
Design Engineer
Technical Expert
Quality Manager
Phone +41 43 343 39 43 – www.enclustra.com
Date
16.04.2019
Date
22.02.2019
08.03.2019
16.04.2019

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Summary of Contents for Enclustra Cosmos XZQ10

  • Page 1 Cosmos XZQ10 System Board User Manual Purpose The purpose of this document is to present the characteristics of Cosmos XZQ10 system board to the user, and to provide the user with a comprehensive guide to understanding and using the Cosmos XZQ10 system board.
  • Page 2 Unauthorized duplication of this document, in whole or in part, by any means is prohibited without the prior written permission of Enclustra GmbH, Switzerland. Although Enclustra GmbH believes that the information included in this publication is correct as of the date of publication, Enclustra GmbH reserves the right to make changes at any time without notice.

  • Page 3: Table Of Contents

    Enclustra Build Environment ........
  • Page 4 Multi-Gigabit Transceiver (MGT) ........42 5.2.1 MGT Multiplexers .
  • Page 5 6.11 Enclustra Module Configuration Tool ........78 I2C Communication Overview .

  • Page 6: Overview

    The Enclustra Build Environment [10] is available for the Cosmos XZQ10 system board. This build system allows the user to quickly set up and run Linux on any Enclustra SoC module or system board. It allows the user to choose the desired target and download all the required binaries, such as bitstream and FSBL (First Stage Boot Loader).

  • Page 7: Rohs

    1.1.4 Disposal and WEEE The Cosmos XZQ10 system board must be properly disposed of at the end of its life. If a battery is installed on the board, it must also be properly disposed of. The Waste Electrical and Electronic Equipment (WEEE) Directive (2002/96/EC) is not applicable for the Cos- mos XZQ10 system board.

  • Page 8: Accessories

    Enclustra Build Environment The Enclustra Build Environment (EBE) [10] enables the user to quickly set up and run Linux on any Enclustra SoC module or system board. It allows the user to choose the desired target, and download all the required binaries, such as bitstream and FSBL.

  • Page 9: Getting Started

    Before connecting or disconnecting FMC cards Before connecting peripherals, make sure that the corresponding I/O voltage is properly set. The operating conditions for the Cosmos XZQ10 system board must be in the ranges given in Section 8. D-0000-450-001 9 / 90...

  • Page 10: System Board Description

    Figure 1: Hardware Block Diagram The main component of the Cosmos XZQ10 system board is the Xilinx Zynq-7000 SoC device. Most of its I/O pins are connected to the FMC HPC connectors, making up to 168 regular user I/Os available to the user.

  • Page 11: Features

    PCIe or generated from the USB-C power input. Power over USB-C is available on the Cosmos XZQ10 system board and power delivery modes are supported after initial power-up. Eight LEDs and three RGB LEDs are equipped on the system board for status signaling or for user functions.

  • Page 12: System Board Features And Configurations

    Feature CO-XZQ10- CO-XZQ10- CO-XZQ10- CO-XZQ10- Description 111-I 262-I 740-I 750-I XC7Z030- XC7Z030- XC7Z045- XC7Z045- SoC device 2FBG676I 2FFG676I 2FFG676I 2FFG676I Number of MGTs QSFP+ connector SFP+ connectors FMC0 (top) FMC1 (bottom) PCIe bracket Light pipe (user RGB LEDs) System monitor Anios connector USB header ports 3/4 Control connector...

  • Page 13: System Board Configuration And Product Codes

    FMC card, depending on the size of the components on the FMC card. Please double-check the mechanical design against the Cosmos XZQ10 system board 3D model and in case mechanical collisions occur, it is possible to order a special product variant without SFP+ connectors.

  • Page 14: Article Numbers And Article Codes

    The correspondence between article number and article code is shown in Table 4. The article code repre- sents the product code, followed by the revision; the R suffix and number represent the revision number. The revision changes and product known issues are described in the Cosmos XZQ10 System Board Known Issues and Changes document [6].

  • Page 15: Top And Bottom Views

    Top and Bottom Views 3.5.1 Top View Figure 4: System Board Top View D-0000-450-001 15 / 90 Version 01, 16.04.2019...

  • Page 16: Bottom View

    3.5.2 Bottom View Figure 5: System Board Bottom View Please note that depending on the hardware revision and configuration, the system board may look slightly different than shown in this document. D-0000-450-001 16 / 90 Version 01, 16.04.2019...

  • Page 17: Top And Bottom Assembly Drawings

    Top and Bottom Assembly Drawings 3.6.1 Top Assembly Drawing Figure 6: System Board Top Assembly Drawing D-0000-450-001 17 / 90 Version 01, 16.04.2019...

  • Page 18: Bottom Assembly Drawing

    3.6.2 Bottom Assembly Drawing Figure 7: System Board Bottom Assembly Drawing Please note that depending on the hardware revision and configuration, the system board may look slightly different than shown in this document. D-0000-450-001 18 / 90 Version 01, 16.04.2019...

  • Page 19: System Board Dimensions

    System Board Dimensions Figure 8: Board Dimensions D-0000-450-001 19 / 90 Version 01, 16.04.2019...

  • Page 20: Pcie Bracket Drawing

    Information on the dimensions of the PCIe bracket can be found in the STEP 3D model [8]. Mechanical Data Table 5 describes the mechanical characteristics of the Cosmos XZQ10 system board. A 3D model (PDF) and a STEP 3D model are available [7], [8].

  • Page 21: Mechanical Components

    3.10 Mechanical Components Tables 6, 7 and 8 describe the mechanical components present on the Cosmos XZQ10 system board. The listed elements are for reference only. Any other components that meet the requirements may be used. For the product variants CO-XZQ10-111-I and CO-XZQ10-262-I no board spacers, screws or brackets are equipped.

  • Page 22: List Of Mechanical Components - Light Pipe

    Product Number Manufacturer Comments Description 7511A62 Visual Communications Equipped on 740 variant Light pipe 2 high clear Company (VCC) rigid round with flat top, 3 mm board mount, press fit, right angle 7511B11 Visual Communications Not equipped by default Light pipe 3 high clear Company (VCC) rigid round with flat top, 3 mm board mount, press...

  • Page 23: Power

    Power over External/Internal Connector 12 V External Power Connector J2900 is used to supply the main VCC input voltage, when the Cosmos XZQ10 system board is not powered via PCIe or USB-C. Apply only 12 V DC to this connector.

  • Page 24: Power Over Pcie

    4.1.2 Power over PCIe The Cosmos XZQ10 system board can be powered over PCIe via the edge connector when the board is inserted into a PCIe backplane providing the required 12 V voltage. The selection of the power source is done automatically - the circuitry for the power selection ensures that no power is delivered from the Cosmos XZQ10 system board via PCIe when it is plugged into a regular motherboard.

  • Page 25: Power Button Control

    Power control is ON Power control is OFF Table 14: Power Control Switch Configuration If power control is disabled, the Cosmos XZQ10 system board is powered as soon as the voltage supply is applied through external or internal power connectors. D-0000-450-001 25 / 90 Version 01, 16.04.2019...

  • Page 26: Power Generation Overview

    If power control is enabled, the Cosmos XZQ10 system board is not powered, even when power is applied to it through these connectors. By pressing one of the power buttons (marked with “PWR”) for a short time, the power is turned on. Power can be turned off again by pressing the power button for a longer time (the exact period is configurable through the system controller).

  • Page 27: Power Enable/Power Good

    Voltage Supply Inputs Table 18 describes the power supply inputs on the Cosmos XZQ10 system board. The VCC voltages used as supplies for the I/O banks are described in Section 4.5 and the main board supply voltage is described in Section 4.1.

  • Page 28: Vcco Usage And Voltage Supply Outputs

    Section 4.6 for details. Table 19 presents the VCCO supply voltages generated on the Cosmos XZQ10 system board and the sup- ported voltage ranges. Some of these supplies are routed further to the FMC connectors (voltages from carrier board to mezzanine card).

  • Page 29: I/O Voltage Selection

    Use only VCC_ADJ_FMC[x] and VCC_CFG_[x] voltages compliant with the equipped SoC device; any other voltages may damage the equipped SoC device, as well as other devices on the Cosmos XZQ10 system board. In addition to this requirement, please check with the FMC standard which FMC signals are mapped to which voltages, in order to set the voltage jumpers accordingly.

  • Page 30: Io Voltage Selection Jumper Positions - Pin Numbering And Configuration Example

    The factory default jumper settings are 2-4, 6-8 and 9-10. As a consequence of these settings, no voltage is applied to the SoC device I/O banks, therefore it prevents the system board from booting. PWGD LED will not be lit. Figure 11 shows the pin numbering for connector J2903 and one configuration example.

  • Page 31: Power Consumption

    SoC is adequately cooled. Table 22 lists the heat sink and thermal pad part numbers that are compatible with the Cosmos XZQ10 sys- tem board. Details on these parts and additional information that may assist in selecting a suitable heat sink for the Cosmos XZQ10 system board can be found in the Enclustra Modules Heat Sink Application Note [9].

  • Page 32: System Board Function

    Details on the MIO/EMIO terminology are available in the Zynq-7000 All Programmable SoC Technical Ref- erence Manual [13]. All MIO pins on the Cosmos XZQ10 system board are connected to on-board peripherals. Some MIO pins are connected to the system controller for the implementation of specific functions. Table 24 gives an overview over the MIO pin connections on the Cosmos XZQ10 system board.

  • Page 33: Mio Pins Connections Overview

    MIO Group Function Connection MDIO select signal I2C/MDIO multiplexer selection QSPI flash controller QSPI flash Used only for SoC bootstrapping QSPI flash controller (feedback clock) I2C interrupt On-board I2C bus 10-15 SD/MMC controller eMMC flash 16-27 Gigabit Ethernet Gigabit Ethernet PHY 28-39 USB 2.0 OTG PHY 40-45...

  • Page 34: Programmable Logic (Pl) I/Os

    Digital RF Buffers There are four mini digital RF headers equipped on the Cosmos XZQ10 system board. Two of them are used for clock input and output signals and the other two are used for digital data input and output signals.

  • Page 35: Fmc Connectors

    For details on the pinout of the FMC LPC (Low Pin Count) and HPC (High Pin Count) cards, please refer to the VITA 57 FMC specification. Table 28 describes the FMC connectors present on the Cosmos XZQ10 system board. Please note that the presence of the FMC connectors on the system board depends on the chosen product variant. Refer to Section 3.3 for details on the system board configuration options.
  • Page 36 FMC form factors. The FMC pinout on the Cosmos XZQ10 system board offers flexibility for the user in terms of connectivity options. In some cases, several signals of the FMC connectors are wired together and the user must ensure that the specific lines are not used simultaneously, in order to avoid collisions.
  • Page 37 Signal FMC Pin Pairs Connectivity Comments Name Type End. FMC0_HB<...>_FMC1_LA<...>_CC_P/N HB CC FPGA bank 13 Shared with FMC1 (LA CC pins) FMC0_HA<00-01>_CC_P/N HA CC FPGA bank 12 Multiplexed with FMC1 (LA pins) FMC0_H<...>_P/N HA/HB FPGA banks 12 Shared with and 13 Anios connec- LEDs and switches...
  • Page 38 Signal FMC Pin Pairs Connectivity Comments Name Type End. FMC0_H<...>_FMC1_LA<...>_P/N FPGA banks 12 Shared with and 13 FMC0 (HA/HB pins) FMC0_HB<...>_FMC1_LA<...>_CC_P/N LA CC FPGA bank 13 Shared with FMC0 (HB CC pins) FMC1_LA<17-18>_CC_P/N LA CC FPGA bank 12 Multiplexed with FMC0 (HA CC pins) FMC1_CLK0_P/N CLK M2C...

  • Page 39: Fmc Signals Shared Between Fmc0 And Fmc1 Connectors - Wired Connection

    Figure 13: FMC Signals Shared between FMC0 and FMC1 Connectors - Wired Connection Figure 14: FMC CC Signals Multiplexed between FMC0 and FMC1 Connectors D-0000-450-001 39 / 90 Version 01, 16.04.2019...

  • Page 40: Anios I/O Connector

    The clock and data signals are routed to FPGA banks 12 and 13 through various multiplexers. Figures 17, 18, 19 depict the connectivity for the Anios connector - for details, refer to the Cosmos XZQ10 D-0000-450-001 40 / 90...

  • Page 41: Signals Shared Between Fmc0 And Anios Connectors - Multiplexed Connection

    System Board User Schematics [5]. Warning! The Anios I/O pins are connected via multiplexers to the SoC device. Use only I/O voltages compliant with the equipped SoC device; any other voltage may damage the SoC device. Figure 17: Signals Shared between FMC0 and Anios Connectors - Multiplexed Connection Figure 18: Signals Shared between FMC0, Anios Connectors and LEDs and switches - Multiplexed Connection D-0000-450-001 41 / 90...

  • Page 42: Multi-Gigabit Transceiver (Mgt)

    On the Cosmos XZQ10 system boards equipped with Zynq-7045 SoC devices, there are eight Multi-Gigabit transceivers and four reference input clock differential pairs available. On the Cosmos XZQ10 system boards equipped with Zynq-7030 SoC devices, there are only four Multi- Gigabit transceivers and two reference input clock differential pairs available.

  • Page 43: Mgt Multiplexers

    8 MGTs @ 10.3125 Gbit/sec Zynq-7045, FFG package Table 33: MGT Switching Characteristics on the Cosmos XZQ10 System Board The MGTs on the Cosmos XZQ10 system board can be routed to various peripherals - please refer to Section 5.2.1. 5.2.1...

  • Page 44: Mgt Multiplexer Connectivity - Data Signals

    Figure 20: MGT Multiplexer Connectivity - Data Signals D-0000-450-001 44 / 90 Version 01, 16.04.2019...

  • Page 45: Sfp+ Connectors

    The power for the SFP+ connectors can be enabled by pulling PWR_EN_SFP# low (active-low signal). When the Cosmos XZQ10 system board is powered via DC power input or PCIe, the SFP+ connectors are automat- ically powered. When USB-C power input is used, the SFP+ connectors are automatically disabled and the...

  • Page 46: Qsfp+ Connector

    The power for the QSFP+ connector can be enabled by pulling PWR_EN_SFP# low (active-low signal). When the Cosmos XZQ10 system board is powered via DC power input or PCIe, the QSFP+ connector is automat- ically powered. When USB-C power input is used, the QSFP+ connector is automatically disabled and the user must pull PWR_EN_SFP# low to enable it.

  • Page 47: Clock Generation

    Clock Generation A 33.33 MHz oscillator is used for the Cosmos XZQ10 system board clock generation; the 33.33 MHz clock (CLK_33) is fed to the PS via PS_CLK pin. This clock is not connected directly to any clock pin of the FPGA fabric.

  • Page 48: Low-Jitter Clock Generator Circuit

    MGT bank 111 (W5 pin) Table 38: System Board Clock Resources 5.3.1 Low-Jitter Clock Generator Circuit The Cosmos XZQ10 system board features a clock generator circuit addressable and configurable via I2C. Table 39 presents the part type. Type Manufacturer Si5338B-B-GMR...

  • Page 49: Clock Generator Overview

    The connections to the clock generator are configurable via clock multiplexers and various circuit elements that can be used to enable/disable different clock paths. The default configuration is marked in bold. For details, please refer to the Cosmos XZQ10 System Board User Schematics [5]. Figure 22: Clock Generator Overview...

  • Page 50: Reset

    DDR3L SDRAM (PS) There are two DDR3 SDRAM channels on the Cosmos XZQ10 system board: one attached directly to the PS side (which is available only as a shared resource to the PL side) and one attached directly to the PL side.

  • Page 51: Ddr3 Sdram Type

    Other DDR3 memory devices may be equipped in future revisions of the Cosmos XZQ10 system board. Please check the user manual regularly for updates. 5.5.2 Signal Description Please refer to the Cosmos XZQ10 System Board FPGA Pinout Excel Sheet [4] for detailed information on the DDR3 SDRAM connections. 5.5.3 Termination Warning! No external termination is implemented on the Cosmos XZQ10 system board.

  • Page 52: Ddr3L Sdram (Pl)

    Table 43: DDR3 SDRAM (PS) Parameters DDR3L SDRAM (PL) The DDR3L SDRAM connected to the PL on the Cosmos XZQ10 system board is operated at 1.35 V (low power mode). The DDR bus width is 16-bit. The DDR3L SDRAM memory connected to the PL supports different bandwidths depending on the equipped...

  • Page 53: Signal Description

    FPGA pins (due to the limited number of FPGA I/Os). 5.6.2 Signal Description Please refer to the Cosmos XZQ10 System Board FPGA Pinout Excel Sheet [4] for detailed information on the DDR3 SDRAM connections. 5.6.3...

  • Page 54: Leds

    15 ns Table 45: DDR3L SDRAM (PL) Parameters LEDs Tables 46 and 47 describe the function of the LEDs on the Cosmos XZQ10 system board. Some of the signals have a predefined function, while others are user LEDs. Name Signal Name...

  • Page 55: System Board Leds With User Functions

    SC5_LED2R# Table 47: System Board LEDs with User Functions The DII and DIO user I/O LEDs on the Cosmos XZQ10 system board can be driven by the SoC device - Section 5.1.4 describes their connectivity options. The two user RGB LEDs are controlled directly by the system controller. These can also be driven by the...

  • Page 56: Buttons

    Table 48: Board Buttons DIP Switches There are three configuration switches on the Cosmos XZQ10 system board: CFG A, CFG B and USER; the latter one can be configured by the user to have various functions. Tables 49 and 50 describe the function of the CFG A and CFG B switches; the factory default is marked in bold.

  • Page 57: S2700 - Configuration Switch A

    Switch Signal Name Pos. Effect Comments BOOT_MODE0 is set to 1 Refer to Section 6.3 CFG A 1 BOOT_MODE0 BOOT_MODE0 is set to 0 Power over USB OFF CFG A 2 PWR_USBC_SINK_EN# Refer to Section 4.1.3 Power over USB ON FMC0 HPC active FMC0_HPC is set to 1: a set of eight FMC signals are routed...

  • Page 58: S2702 - Configuration Switch B

    Switch Signal Name Pos. Effect Comments The USB 2.0 PHY signals are routed to the Refer to USB-C connector CFG B 1 USB_ID The USB 2.0 PHY signals are routed to Section 5.10 the USB hub upstream Refer to On startup: BOOT_MODE1 is set to 1 After startup: The FTDI signals are Sections 5.10 routed to the micro USB connector...

  • Page 59: Usb

    Table 51: S2703 - User Configuration Switch 5.10 5.10.1 USB Overview Figure 24 presents an overview of the USB connections on the Cosmos XZQ10 system board. The default configuration is marked in bold. Figure 24: USB Connections Overview D-0000-450-001 59 / 90...

  • Page 60: Usb 2.0 Phy

    Cosmos XZQ10 system board. 5.10.2 USB 2.0 PHY The Cosmos XZQ10 system board has an on-board USB 2.0 PHY connected to the SoC device. The USB interface can be configured for USB host or device mode. USB PHY Type Table 52 describes the equipped USB PHY device type on the Cosmos XZQ10 system board.

  • Page 61: Sc Usb 2.0 Device Controller (Ftdi)

    5.10.4 SC USB 2.0 Device Controller (FTDI) The FTDI FT2232HQ USB 2.0 device controller present on the Cosmos XZQ10 system board can be used to easily implement a communication link to a host PC. The FTDI device is connected to the system controller (SC) and can be used for various functions like UART, I2C, on-board QSPI flash programming and JTAG.

  • Page 62: External Connectivity Ftdi Usb 2.0

    SC USB 2.0 Device PHY - Reserved for Future Use The SC USB 2.0 device PHY equipped on the Cosmos XZQ10 system board is reserved for future use (possible ULPI implementation in the system controller and replacement of the FTDI chip). Currently, this PHY is kept in reset, therefore unused.

  • Page 63: Signal Description

    The Ethernet signals coming from the Gigabit Ethernet PHY via magnetics are connected to an RJ45 con- nector (J2600). 5.12 Dual Fast Ethernet There are two 10/100 Mbit Ethernet PHYs equipped on the Cosmos XZQ10 system board, connected to FPGA I/Os via RMII interface, in master signaling mode. 5.12.1 Ethernet PHY Type Table 56 describes the equipped Ethernet PHY device type on the Cosmos XZQ10 system board.

  • Page 64: Signal Description

    The RMII interfaces are connected to the FPGA pins in banks 33 and 34 for use with soft Ethernet MAC IP cores. The two Fast Ethernet PHYs have a shared MDIO interface and shared reset and interrupt signals. Details on connections are available in the Cosmos XZQ10 System Board User Schematics [5] and in the FPGA Pinout Excel Sheet [4].

  • Page 65: Qspi Flash

    Table 58 describes the memory availability and configuration on the Cosmos XZQ10 system board. As there is one QSPI flash chip equipped on the Cosmos XZQ10 system board, type “single” must be selected when programming the flash from Vivado tools.

  • Page 66: Emmc Flash

    16 GB Kingston Table 59: eMMC Flash Type Warning! Other flash memory devices may be equipped in future revisions of the Cosmos XZQ10 system board. Please check the user manual regularly for updates. 5.14.2 Signal Description The eMMC flash signals are connected to the MIO pins 10-15 for 4-bit data transfer mode. The command and data signals are equipped with 10 k pull-up resistors to VCC_CFG_MIO.

  • Page 67: Sfp+ I2C Expander

    This device is connected to the I2C bus, as described in Section 7. The interrupt pin of the I/O expander is connected to the I2C global interrupt line. 5.16.1 SFP+ I2C Expander Type Table 60 describes the equipped SFP+ I2C I/O expander device type on the Cosmos XZQ10 system board. Type Manufacturer PCAL6416AHF,128 Table 60: SFP+ I2C I/O Expander Type 5.16.2...

  • Page 68: I2C Multiplexer

    I2C Multiplexer An 8-channel I2C multiplexer device is used to address several I2C devices on the Cosmos XZQ10 system board. This device is connected to the main I2C bus accessible from the PL and PS sides of the SoC device and from the system controller.

  • Page 69: Real-Time Clock (Rtc)

    A real-time clock is connected to the I2C bus. The RTC features a battery-buffered 128 bytes user SRAM and a temperature sensor. See Section 7 for details on the I2C bus on the Cosmos XZQ10 system board. VBAT pin of the RTC is connected to VCC_BAT signal on the system board, and can be connected to a 3 V battery - refer to Section 5.24 for details on the battery holder.

  • Page 70: Secure Eeprom

    User EEPROM The Cosmos XZQ10 system board features a user EEPROM which may be accessed via I2C, as described in Section 7. It can be used to store user data (e.g. a serial number) and can be accessed by the SoC device and by the system controller.

  • Page 71: J2800 - Control Connector

    Pin Number Signal Name Description Function VCC_MAIN_CM Main system board power supply (12 V) Monitor Ground VCC_5V0 On-board 5 V voltage Monitor VCC_3V3_SC 3.3 V DC voltage supply for the system Monitor controller UART_RX_EXT External connection UART RX, config- Control urable via system controller registers See Section 5.25 for details Supply input/...

  • Page 72: Fan Connectors

    Fan Connectors There are two fan connectors available on the Cosmos XZQ10 system board, to which a 5 V, respectively a 12 V fan can be connected. The connector for the 12 V fan has a dedicated pin for speed sense signal, which is further routed to the tachometer input of the system monitor.

  • Page 73: System Controller

    5.25 System Controller Contact Enclustra support for further information. D-0000-450-001 73 / 90 Version 01, 16.04.2019...

  • Page 74: Device Configuration

    After the FPGA is successfully configured, the PUDC pin has the function of a normal I/O - on the Cosmos XZQ10 system board this pin is connected to the shared Fast Ethernet MDIO pin. As PUDC is an active-low signal, all FPGA I/Os will have the internal pull-up resistors enabled during device configuration.

  • Page 75: Pull-Up During Configuration (Pudc)

    Figure 25: Pull-Up During Configuration (PUDC) Figure 26: Pull-Up During Configuration (PUDC) R207 Resistor - Assembly Drawing Top View Figure 27: Pull-Up During Configuration (PUDC) R206 Resistor - Assembly Drawing Bottom View For details on the PUDC signal please refer to the Zynq-7000 All Programmable SoC Technical Reference Manual [13].

  • Page 76: Boot Mode

    ESD. Series termination resistors are equipped on these signals between the FPGA con- figuration bank and the JTAG headers. The standard JTAG connector available on the Cosmos XZQ10 system board can be used in combination with Xilinx Platform Cable USB.

  • Page 77: Jtag Over System Controller

    The following steps need to be taken in order to use the Xilinx built-in JTAG: Set the FTDI device in Xilinx JTAG mode using the Enclustra Module Configuration Tool (MCT) [12] Set the USB_SEL signal so that the currently used USB connector is routed to the FTDI device (refer to Sections 5.9 and 5.10)

  • Page 78: Qspi Flash Programming Via Jtag

    Enclustra Module Configuration Tool Enclustra Module Configuration Tool (MCT) [12] can be used to print information on the configuration of the system board, to enable the Xilinx built-in JTAG and to program the QSPI flash from the FTDI USB 2.0 controller.

  • Page 79: I2C Communication

    7 I2C Communication Overview The I2C bus on the Cosmos XZQ10 system board is connected to the SoC device and to several other devices on-board. Additional devices can be attached to the I2C via Anios, FMC, QSFP+ and SFP+ connectors.

  • Page 80: I2C Address Map

    Figure 28: I2C Bus Structure and Devices I2C Address Map Table 78 describes the connections and I2C addresses for several devices connected on I2C bus. D-0000-450-001 80 / 90 Version 01, 16.04.2019...

  • Page 81: I2C Addresses

    Schematic I2C Device Address (7-bit) I2C Bus Connectivity Part U2007 User EEPROM 0x56 I2C_SCL / I2C_SDA 0x64 U901 Secure EEPROM I2C_SCL / I2C_SDA 0x5C (assembly option, refer to Section 5.20) U903 RTC user SRAM 0x57 I2C_SCL / I2C_SDA U903 RTC registers 0x6F I2C_SCL / I2C_SDA U2200...

  • Page 82: Secure Eeprom

    An example demonstrating how to read the system board information from the EEPROM memory is included in the Cosmos XZQ10 system board reference design. Warning! The secure EEPROM is for Enclustra use only. Any attempt to write data to the secure EEPROM causes the warranty to be rendered void. 7.5.1...
  • Page 83 System Board Configuration Addr. Bits Comment Min. Value Max. Value Comment See SoC type SoC type 0x08 table (Table 82) SoC device speed grade Temperature range 0 (Commercial) 1 (Industrial) Power grade 0 (Normal) 1 (Low power) Gigabit Ethernet port count 0x09 Fast Ethernet port count RTC equipped...

  • Page 84: Soc Device Types

    MAC addresses; only the lower one is stored in the EEPROM. If all three Ethernet interfaces shall be used, the user must provide the third MAC address; the first two addresses are already provided by Enclustra. D-0000-450-001 84 / 90 Version 01, 16.04.2019...

  • Page 85: Operating Conditions

    8 Operating Conditions Absolute Maximum Ratings Table 84 indicates the absolute maximum ratings for Cosmos XZQ10 system board. The values given are for reference only; for details please refer to the Zynq-7000 DC and AC Switching Characteristics Datasheet [18]. Symbol...

  • Page 86: Ordering And Support

    9 Ordering and Support Ordering Please use the Enclustra online request/order form for ordering or requesting information: http://www.enclustra.com/en/order/ Support Please follow the instructions on the Enclustra online support site: http://www.enclustra.com/en/support/ D-0000-450-001 86 / 90 Version 01, 16.04.2019...
  • Page 87 List of Figures Hardware Block Diagram ........10 Product Code Fields .
  • Page 88 MGT Pairs ..........42 MGT Switching Characteristics on the Cosmos XZQ10 System Board ....43 MGT Reference Clock - MGT Multiplexer Control .
  • Page 89 I2C Addresses ..........81 EEPROM Sector 0 Memory Map .
  • Page 90 [1] Enclustra General Business Conditions http://www.enclustra.com/en/products/gbc/ [2] Cosmos XZQ10 System Board Reference Design Ask Enclustra for details [3] Cosmos XZQ10 System Board IO Net Length Excel Sheet Ask Enclustra for details [4] Cosmos XZQ10 System Board FPGA Pinout Excel Sheet Ask Enclustra for details...

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