Enclustra 103 Getting Started Manual

Fpga manager ethernet

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Getting Started Guide for FPGA Manager
Purpose
The purpose of this document is to describe how to get started with FPGA Manager.
Product Information
Product
Base Development Project
Document Information
Reference / Version / Date
Approval Information
Written by
Verified by
Approved by
FPGA Manager
Ethernet
Number
103
305
Reference
D-0000-103-305
Name
MFRE
RSTE
PMUE
Enclustra GmbH – Räffelstrasse 28 – CH-8045 Zürich – Switzerland
Name
FPGA Manager
Getting Started
Version
01
Position
Design Engineer
Technical Expert
VP Marketing
Phone +41 43 343 39 43 – www.enclustra.com
Date
15.08.2018
Date
10.08.2018
14.08.2018
15.08.2018

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Summary of Contents for Enclustra 103

  • Page 1 Approval Information Name Position Date Written by MFRE Design Engineer 10.08.2018 Verified by RSTE Technical Expert 14.08.2018 Approved by PMUE VP Marketing 15.08.2018 Enclustra GmbH – Räffelstrasse 28 – CH-8045 Zürich – Switzerland Phone +41 43 343 39 43 – www.enclustra.com...
  • Page 2 Unauthorized duplication of this document, in whole or in part, by any means is prohibited without the prior written permission of Enclustra GmbH, Switzerland. Although Enclustra GmbH believes that the information included in this publication is correct as of the date of publication, Enclustra GmbH reserves the right to make changes at any time without notice.
  • Page 3: Table Of Contents

    JTAG Connection Issues ......... . 22 D-0000-103-305 3 / 23 Version 01, 15.08.2018...
  • Page 4: Overview

    The FPGA Manager getting started demonstrates how the FPGA Manager is used on a Mercury KX1 FPGA module in combination with the Enclustra Mercury+ PE1 base board (any board variant) or with the regular Enclustra Mercury PE1 base board (previous revisions). It presents the basic configuration of the device and features some example applications.
  • Page 5: Prerequisites

    • Enclustra Module Configuration Tool (MCT) [6] (optional • Hardware • An Enclustra Mercury KX1 FPGA module • An Enclustra Mercury+ PE1 base board (any board variant) or a regular Mercury PE1 base board (previous revisions) • Accessories • A standard micro USB cable •...
  • Page 6: Setup

    Please read carefully the Mercury KX1 FPGA module and Mercury+ PE1 base board user manuals before proceeding. Note that when Enclustra MCT [6] is used for FPGA configuration or flash programming, all other tools that may be connected to the FTDI device (e.g. Vivado Hardware Manager, SDK, UART terminal) must be closed.
  • Page 7: Hardware Setup

    Mercury+ PE1 base board before proceeding. Connect the USB cable between your computer and the Mercury+ PE1 base board. Use the micro USB port labeled USBUB in Figure 2. Continued on next page... D-0000-103-305 7 / 23 Version 01, 15.08.2018...
  • Page 8: Hardware Setup Step-By-Step Guide

    Per default JTAG over USB is used. For this, the FTDI device on the Mercury+ PE1 base board must be configured to Xilinx JTAG mode using Enclustra MCT [6]. Alternatively, connect the Xilinx Platform Cable USB to the JTAG connector of the Mercury+ PE1...
  • Page 9: Software Setup

    Visit the Xilinx hompage www.xilinx.com for download and install instructions Note for Windows: If the user does not intend to create the bitstream himself, the Enclustra Module Con- figuration Tool (MCT) [6] can be used to download the bitstream to the FPGA instead of Vivado 2.3.2...
  • Page 10: Linux

    4. Install .NET Core SDK sudo a p t i n s t a l l dotnet sdk 2 . 1 Visual Studio Code (optional) Visit https://code.visualstudio.com/ to download the package and install it. https://docs.microsoft.com/en-us/dotnet/core/linux-prerequisites?tabs=netcore2x D-0000-103-305 10 / 23 Version 01, 15.08.2018...
  • Page 11: Fpga Bitstream Generation

    2. In the Launch Runs window click OK - this will start automatically the entire implementation process 3. Wait for completion → select View Reports → OK Table 3: FPGA Bitstream Generation Step-By-Step Guide D-0000-103-305 11 / 23 Version 01, 15.08.2018...
  • Page 12: Getting Started

    2. On the top left click Browse 3. On the top right of the window in Package source (a) Select ‘Enclustra‘ (or what ever name has been chosen during step 3) 4. Select Enclustra.FPGAManager.ApiCpp 5. Tick the project in the list on the right 6.
  • Page 13: Setup Cpp Project

    3. Readout the value of a memory mapped register The code for these steps is shown in the listing 1 Table 4: Visual Studio Step-By-Step Guide Figure 4: Setup Cpp project Figure 5: Add NuGet Source D-0000-103-305 13 / 23 Version 01, 15.08.2018...
  • Page 14: Install Fpga Manager Cpp Package

    Figure 6: Install FPGA Manager Cpp package Figure 7: Change Linker settings D-0000-103-305 14 / 23 Version 01, 15.08.2018...
  • Page 15: Softwareproject .Net

    2. Click on Package Sources on the Left 3. Click Add (green plus symbol) 4. Give the new package source a name: e.g. ’Enclustra’ 5. For Source field hit ... and browse for the NuGet folder 6. Click on Update 7.
  • Page 16: Visual Studio .Net Project Step-By-Step Guide

    2. On the top left click Browse 3. On the top right of the window in Package source (a) Select ‘Enclustra‘ (or what ever name has been chosen during step 3) 4. Select Enclustra.FPGAManager.ApiDotNet 5. Tick the project in the list on the right 6.
  • Page 17: Setup .Net Project

    Figure 8: Setup .NET project Figure 9: Add NuGet Source D-0000-103-305 17 / 23 Version 01, 15.08.2018...
  • Page 18: Install Fpga Manager .Net Package

    Figure 10: Install FPGA Manager .Net package Figure 11: Change Build settings Listing 2: C# dotNet Hello world Example namespace DemonstrateHelloWorld using System; using FPGAMgr = Enclustra.FPGAManager; class Program static void Main(string [] args) using (var mgr FPGAMgr.FpgaManagerApi(FPGAMgr.ApiUrl.UDP("192.168.33.12"))) Console.WriteLine($"FPGA Manager Version: {mgr.Details.BaseDllVersion} / {mgr.Details.ApiDllVersion}");...
  • Page 19: Run The Example

    < i n t e r f a c e > 1 9 2 . 1 6 8 . 3 3 . 1 netmask 2 5 5 : 2 5 5 : 2 5 5 . 0 D-0000-103-305 19 / 23 Version 01, 15.08.2018...
  • Page 20: Fpga Programming

    LED on the Mercury+ PE1 base board should be lit. The LED 3 on the module Mercury KX1 FPGA module should start blinking Table 7: FPGA Programming Step-By-Step Guide Figure 13: Select the Device to program D-0000-103-305 20 / 23 Version 01, 15.08.2018...
  • Page 21: Launch The Application

    As shown in figure 15 the software version and the content of the demo register ”CAFEBABE” should be shown in the console window. Figure 15: Console output Congratulations! You got your first example working. D-0000-103-305 21 / 23 Version 01, 15.08.2018...
  • Page 22: Troubleshooting

    4. Remove the USB connection and power supply from the Mercury+ PE1 base board 5. Reconnect USB and power supply to the Mercury+ PE1 base board 6. Reboot the computer if the problem persists For other problems write an e-mail to: ipsupport@enclustra.com D-0000-103-305 22 / 23...
  • Page 23 [5] Mercury+ PE1 Base Board User Manual → Ask Enclustra for details [6] Enclustra Module Configuration Tool (MCT) → Ask Enclustra for details [7] Enclustra Modules Heat Sink Application Note → Ask Enclustra for details D-0000-103-305 23 / 23 Version 01, 15.08.2018...

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