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Enclustra Mars ZX3 User Manual

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Mars ZX3 SoC Module
Reference Design for Mars PM3 Base Board
Purpose
The purpose of this document is to present to the user the overall view of the Mars ZX3 SoC module
reference design and to provide the user with a step-by-step guide to the complete Xilinx® SoC design
flow used for the Mars ZX3 SoC module.
Summary
This document first gives an overview of the Mars ZX3 SoC module reference design and then guides
through the complete Xilinx SoC design flow for the Mars ZX3 SoC module in the getting started sec-
tion. In addition, the internals and the boot options of the Mars ZX3 SoC module reference design are
described.
Product Information
Product
Document Information
Reference / Version / Date
Approval Information
Written by
Verified by
Approved by
User Manual
Code
MA-ZX3
Reference
D-0000-489-005
Name
DDUE/ARUD/ESOM
GKOE
IJOS
Enclustra GmbH – Räffelstrasse 28 – CH-8045 Zürich – Switzerland
Name
Mars ZX3 SoC Module
Version
2022.1_v1.1.2
Position
Design Engineer
Design Expert
Manager, BU SP
Phone +41 43 343 39 43 – www.enclustra.com
Date
15.10.2022
Date
30.09.2022
05.10.2022
15.10.2022

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Summary of Contents for Enclustra Mars ZX3

  • Page 1 User Manual Purpose The purpose of this document is to present to the user the overall view of the Mars ZX3 SoC module reference design and to provide the user with a step-by-step guide to the complete Xilinx® SoC design flow used for the Mars ZX3 SoC module.
  • Page 2 License Copyright 2023 by Enclustra GmbH, Switzerland. Permission is hereby granted, free of charge, to any person obtaining a copy of this hardware, software, firmware, and associated documentation files (the ”Product”), to deal in the Product without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or...

  • Page 3: Table Of Contents

    Table of Contents Overview Introduction ..........Prerequisites .

  • Page 4: Overview

    Only required for SD card boot mode May be used for flash programming, for SoC device configuration or for FTDI configuration. Any FTDI device present on Enclustra hardware can be configured to Xilinx JTAG mode using the Enclustra MCT software [5]. D-0000-489-005 4 / 25 Version 2022.1_v1.1.2, 15.10.2022...

  • Page 5: Reference Design Description

    2 Reference Design Description Enclustra Mars PM3 Base Board Enclustra Mars ZX3 SoC Module Xilinx Zynq-7000 SoC Processing System (PS) ARM Cortex-A9 CPU User EEPROM USB Host EEPROM USB PHY Connector Controller Controller DDR3(L) SDRAM System SDRAM Controller Monitor RJ45...

  • Page 6: Sd Card

    The SD card is configured in the PS to the MIO 40..45 and 50 pins. This enables SD card access, as well as booting from the SD card. To allow the Mars ZX3 SoC module to boot from the SD card, the hardware configuration on the Mars PM3 base board must be done according to Section 4.2.2.

  • Page 7: Ethernet

    The unused MIO pins from the PS are available as GPIOs. For details on the MIO assignement refer to the Multiplexed I/O (MIO) Pins section in the Mars ZX3 SoC module User Manual [3]. Check the connectivity of the MIOs that provide user functionality with the Mars PM3 base board User Manual [4]...

  • Page 8: Programmable Logic (Pl)

    Temperature control and monitoring is very important in a complex design. Information that may assist in selecting a suitable heat sink for the Mars ZX3 SoC module can be found in the Enclustra Modules Heat Sink Application Note [10].

  • Page 9: Getting Started

    Warning! Never mount or remove the Mars ZX3 SoC module to or from the Mars PM3 base board while the Mars PM3 base board is powered. Always remove or turn off the power supply before mounting or removing the Mars ZX3 SoC module.

  • Page 10: Hardware Setup

    Make sure the SD card slot of the Mars PM3 base board is empty (see label SD Card in Figure Mount the Mars ZX3 SoC module to the Mars PM3 base board. Connect the micro USB cable between your computer and the Mars PM3 base board. Use the micro USB port labeled USBUB in Figure 2.

  • Page 11: Fpga Bitstream Generation

    Tcl file. 2. Save the file after editing. Start Xilinx Vivado 2022.1 and create the Mars ZX3 SoC module reference design project: 1. Click on the Tcl console at the bottom of the page and type: (a) cd {<base_dir>/reference_design}...

  • Page 12: Vitis Workspace Preparation

    Step Description Export the hardware system information (required for the Vitis IDE): 1. File Export Export Hardware and click Next 2. Select Include Bitstream and click Next 3. Leave the file name and export location as default and click Next 4.

  • Page 13: Vitis Workspace Preparation Step-By-Step Guide

    Step Description Create a new application 1. File Application Project 2. In the New Application Project window: (a) Click Next if Welcome Page is displayed (b) Select the previously generated platform and click Next (c) For Project Name type a description for the new application e.g. ”HelloWorld” (d) For the System project select ”Create New...”...

  • Page 14: Running Software Applications

    Running Software Applications This section describes how to run software applications on the Mars ZX3 SoC module. The steps are generic, and apply to the software example templates in the Vitis IDE. Step Description Create a run configuration for the application in Vitis IDE 2022.1: 1.

  • Page 15: Run Configurations Settings - Application Tab

    Figure 3: Run Configurations Settings - Application Tab Figure 4: Run Configurations Settings - Target Setup Tab D-0000-489-005 15 / 25 Version 2022.1_v1.1.2, 15.10.2022...

  • Page 16: Boot Configurations

    For a fast test of the boot configurations, the pre-generated .bin images may be used for boot, instead of rebuilding the image. You need to select the file corresponding to the Mars ZX3 SoC module variant. Pre-generated binaries for any ZX3 variant are released on the ZX3 Reference Design Github page.

  • Page 17: Programming The Qspi Flash

    Step Description Connect the 12 V DC power supply plug to the power connector of the Mars PM3 base board (see label 12 V DC in Figure 2). Table 9: Preparing the Hardware for QSPI Flash Boot Mode Step-by-Step Guide 4.1.2 Programming the QSPI Flash In order to program Zynq-7000 devices a modification to the standard FSBL generated during platform...
  • Page 18 Add Configuration Memory Device (see Figure 7) (a) For Select Configuration Memory Part choose the memory part according to the Mars ZX3 SoC Module User Manual [3], part type single. This is in most cases s25fl512s-1.8v-qspi-x4-single. (b) Hit OK 4. In Program Configuration Memory Device window (see Figure 8): (a) For Configuration file select the boot image generated as described in Section 4.0.1...

  • Page 19: Enable Xilffs In Vitis

    Step Description Optional - alternatively, Enclustra Module Configuration Tool (MCT) [5] can be used to pro- gram the QSPI flash. Before programming the QSPI flash from MCT, make sure the hardware configuration on the Mars PM3 base board is done according to Section 3.2. Additionally remove Jumper Reset FX3 from the JTAG breakout board to allow MCT to connect to the Module.

  • Page 20: Qspi Flash Programming Settings In Vivado - Adding The Memory Device

    Figure 7: QSPI Flash Programming Settings in Vivado - Adding the Memory Device Figure 8: QSPI Flash Programming Settings in Vivado D-0000-489-005 20 / 25 Version 2022.1_v1.1.2, 15.10.2022...

  • Page 21: Booting From The Qspi Flash

    Warning! Some Vivado and Vitis tool versions are reporting problems when configuring certain SoC devices or when using particular boot modes. Please try different tool versions and check the Xilinx documenta- tion and forums for help on the reported issue. 4.1.3 Booting from the QSPI Flash Step...

  • Page 22: Booting From The Sd Card

    4.2.4 Booting from the SD Card Step Description Insert the SD card into the SD card slot of the Mars PM3 base board (see label SD Card Figure 2). Power on the Mars PM3 base board (see label 12 V DC in Figure 2).

  • Page 23: Troubleshooting

    2. If built-in JTAG is used, check that the FTDI device is configured to Xilinx JTAG mode. This can be done using the Enclustra MCT software [5]. More information on the Xilinx JTAG mode configuration on the Mars PM3 base board can be retrieved from the Mars PM3 base board user manual [4].

  • Page 24: Qspi Boot Issues

    3. If the UART used is mapped to the EMIO pins in the PS, resetting the ARM core will not suffice. Reprogramming the PL is necessary, as the UART lines go through PL. 4. Make sure that Enclustra MCT software is not open. After closing it, unplug and plug in again the USB cable corresponding to the UART communication.
  • Page 25 [1] Vivado Design Suite User Guide, Embedded Processor Hardware Design, UG898, Xilinx, 2019 [2] Zynq-7000 All Programmable SoC Embedded Design Tutorial, UG1165, Xilinx, 2015 [3] Mars ZX3 SoC Module User Manual Ask Enclustra for details [4] Mars PM3 Base Board User Manual...

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