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Figure 2-38 illustrates the method used to recomplement.
After subtracting 52 from 27, the ALU result is 75. To
recomplement, the result is fed back through the B register
and is decimal complemented before entering the ALU. The
A register is set to 1 on the first cycle and is left blank each
remaining cycle. The decimal complement of the A register
is subtracted from the B register complement. A carry
is forced into the first digit just as in regular complementing.
The final result is the lO's complement of the original
result.
CHECK ALU
Parity Generation and Parity Check
Because the parity of the results does not stay constant
with the inputs, correct parity is generated for the ALU
output. After the data leaves the A and B registers, it
can be altered by the decimal and binary complement
circuits, the ALU, the decimal correct circuits, and the sign
control circuits. The parity changes caused by all these
must be considered when determining the parity of the
ALU output.
A second ALU, or check ALU, is provided to determine
the parity changes which take place within the ALU (Figure
2-39). The check ALU does not have a latched output,
decimal correction, or sign control, but otherwise performs
similarly to the ALU. The output of the check ALU is a
group of exclusive ORs which count the number of changes
made to the B register complement after it enters the ALU.
The check ALU output is then added to the changes caused
by the B register complement, sign control, and the decimal
correct circuits to determine if a P bit is required for the
ALU. The output of the ALU is then checked to ensure
that it has odd parity.
The A register complement circuits are checked separately.
Incorrect parity from either the ALU or the A register
complement circuits cause an ALU parity error (Figure
2-39).
Carry Check
An additional set of carry triggers is used to control carries
from the high order bit of the check ALU. The triggers
function identically to the digit carry trigger and the
temporary carry trigger used for the ALU. The outputs of
the two carry control groups are then compared to check
for the correct number of carries for the ALU (Figure 2-40).
Subtract Cycles
Borrowed Amount
B Register
A Register
Carry
Total
22 2
0010
0101
1 1
1101
Borrowed Amount
2
2
B Register (9's Complement)
0010
A
Register (9's Complement of 1) 1001
Carry
11
Total
1000
"Mathematical carry; not done by carry circuits
Figure 2-38. Recomplement
2-32
0111
0010
Borrowed Amount
32
0 1 0 1 - - - - - - - Total------1101
Recomplement Cycles
2 22
0100
1000
111-Forced
Decimal Correct
0110
Carry"
11
Total
0111
Borrowed Amount
22
1011 - - - - - -.. Total - - - - - - 1 0 0 0
Decimal Correct
011 O
Carry"
11
Total
0010
0101
0101
2
1011
0110
0101 (minus)
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