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Diode
Board
(see SR 204)
Figure 2-7. 32K Array Assembly
Two cores are addressed in every plane during a read oper-
ation and during a write operation. During a read operation,
nine bits are sent to the sense data latches (which are also
called the storage data register-SDR). During a write oper-
ation, either the same nine bits or nine different bits (stor-
ing new data) from the ALU are written back into the core
planes.
Each drive line (X or Y) js connected to the array through
diodes on the top diode board or the bottom diode board
(Figure 2-8). These diodes are part of the gate and selection
system described under "X/Y Drive System" in this chapter.
1--0-_B_K _ _
s_eg_m_e.._I
n _ t _ : _ : _ ~ _ 6 _ ·
K_1_. _2__, /
16K-24K
24K-32K
Segment B
SAR= 1,
2
I
SAR= 1, 2
Top Diode Board
Read Write{
'
\--~
Bottom Diode Board
ti
~Dri~
Read
Write
Figure 2-8. Diodes X- and Y-Drive Lines
Bottom
Diode
Y-Drive
5410 TO
2-7
E
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